TC1017 Microchip Technology, TC1017 Datasheet - Page 11

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TC1017

Manufacturer Part Number
TC1017
Description
Tiny CMOS LDO
Manufacturer
Microchip Technology
Datasheet

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4.1
Low input source impedance is necessary for the LDO
to operate properly. When operating from batteries, or
in applications with long lead length (> 10") between
the input source and the LDO, some input capacitance
is required. A minimum of 0.1 µF is recommended for
most applications and the capacitor should be placed
as close to the input of the LDO as is practical. Larger
input capacitors will help reduce the input impedance
and further reduce any high-frequency noise on the
input and output of the LDO.
4.2
A minimum output capacitance of 1 µF for the TC1017
is required for stability. The equivalent series resis-
tance (ESR) requirements on the output capacitor are
between 0 and 2 ohms. The output capacitor should be
located as close to the LDO output as is practical.
Ceramic materials X7R and X5R have low temperature
coefficients and are well within the acceptable ESR
range required. A typical 1 µF X5R 0805 capacitor has
an ESR of 50 milli-ohms. Larger output capacitors can
be used with the TC1017 to improve dynamic behavior
and input ripple-rejection performance.
Ceramic, aluminum electrolytic or tantalum capacitor
types can be used. Since many aluminum electrolytic
capacitors freeze at approximately –30 C, ceramic or
solid tantalums are recommended for applications
operating below –25 C. When operating from sources
other than batteries, supply-noise rejection and
transient response can be improved by increasing the
value of the input and output capacitors and employing
passive filtering techniques.
FIGURE 4-3:
2003 Microchip Technology Inc.
Input Capacitor
Output Capacitor
SHDN
V
OUT
Wake-Up Time from Shutdown.
V
IL
4.3
The turn-on response is defined as two separate
response categories, wake-up time (t
time (t
The TC1017 has a fast wake-up time (10 µsec, typical)
when released from shutdown. See Figure 4-3 for the
wake-up time designated as t
defined as the time it takes for the output to rise to 2%
of the V
The total turn-on response is defined as the settling
time (t
t
within 98% of its fully-enabled value (32 µsec, typical)
when released from shutdown. The settling time of the
output voltage is dependent on load conditions and
output capacitance on V
The table below demonstrates the typical turn-on
response timing for different input voltage power-up
frequencies: V
and C
WK
Frequency
) is defined as the condition when the output is
1000 Hz
500 Hz
100 Hz
OUT
50 Hz
10 Hz
S
S
) (see Figure 4-3). Settling time (inclusive with
).
OUT
Turn-On Response
= 1 µF.
2%
value after being released from shutdown.
OUT
t
WK
V
98%
IH
= 2.85V, V
Typical (t
14.5 µsec
17.2 µsec
5.3 µsec
5.9 µsec
9.8 µsec
OUT
t
S
(RC response).
WK
IN
WK
. The wake-up time is
= 5.0V, I
)
TC1017
DS21813B-page 11
WK
Typical (t
) and settling
OUT
14 µsec
16 µsec
32 µsec
52 µsec
77 µsec
= 60 mA
S
)

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