MACH210A-12VC Lattice, MACH210A-12VC Datasheet - Page 14

• Manufacturer Part Number: MACH210A-12VC
• Description: High-Density EE CMOS Programmable Logic
• Manufacturer: Lattice

CAPACITANCE (Note 1)
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 2)
Parameter
Parameter
14
Symbol
Symbol
f
t
t
t
C
t
MAXIR
f
t
t
WICH
t
t
t
t
t
t
WICL
t
t
t
t
t
t
GWL
t
IGOL
t
MAX
t
t
C
PDL
IGO
WH
SIR
HIR
ICO
ICS
SLL
IGS
t
CO
WL
GO
SIL
HIL
PD
S
SL
HL
OUT
H
IN
Setup Time from Input, I/O,
or Feedback to Clock
Parameter Description
Input, I/O, or Feedback to Combinatorial Output
(Note 3)
Register Data Hold Time
Clock to Output (Note 3)
Clock
Width
Setup Time from Input, I/O, or Feedback to Gate
Latch Data Hold Time
Gate to Output (Note 3)
Gate Width LOW
Input, I/O, or Feedback to Output Through
Transparent Input or Output Latch
Input Register Setup Time
Input Register Hold Time
Input Register Clock to Combinatorial Output
Input Register Clock to Output Register Setup
Input Register
Clock Width
Maximum Input Register Frequency
Input Latch Setup Time
Input Latch Hold Time
Input Latch Gate to Combinatorial Output
Input Latch Gate to Output Through Transparent
Output Latch
Setup Time from Input, I/O, or Feedback Through
Transparent Input Latch to Output Latch Gate
Input Latch Gate to Output Latch Setup
Maximum
Frequency
(Note 1)
Parameter Description
Input Capacitance
Output Capacitance
External Feedback
Internal Feedback (f
No Feedback
CNT
MACH210A-10/12 (Com’l)
1/(t
1/(t
S
)
S
+ t
1/(t
+ t
Test Conditions
V
V
H
IN
OUT
CO
WICL
)
= 2.0 V
)
= 2.0 V
+ t
WICH
D-Type
T-Type
LOW
HIGH
D-Type
T-Type
D-Type
T-Type
D-Type
T-Type
LOW
HIGH
)
V
f = 1 MHz
CC
= 5.0 V, T
A
= 25 C,
Min
100
100
100
6.5
7.5
6.5
8.5
80
74
91
10
11
11
0
5
5
0
5
2
2
5
5
2
2
-10
Max
10
12
16
13
14
6
7
62.5
76.9
83.3
83.3
66.7
83.3
Min
12
13
13
7
8
0
6
6
7
0
6
2
2
6
6
2
2
9
Typ
-12
6
8
Max
12
19
10
14
15
17
8
Unit
pF
pF
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns