SM5838AS Nippon Precision Circuits Inc, SM5838AS Datasheet - Page 6

• Manufacturer Part Number: SM5838AS
• Description: 5120 X 8-bit Synchronous FIFO
• Manufacturer: Nippon Precision Circuits Inc

FUNCTIONAL DESCRIPTION
At power-ON reset, device operation can become
irregular during the interval when the control circuits
are being reset. After power-ON reset is released,
this can take up to several 10s of ms in some cases.
Write Reset Cycle, Read Reset Cycle
After power-ON, the write address pointer and read
address pointer positions are undefined. Accordingly,
it is necessary to initialize the pointers using a write
reset cycle and read reset cycle, respectively.
A write reset cycle (read reset cycle) is valid when
RW (RR) goes LOW for an interval that satisfies
Write reset cycle
Read reset cycle
Note the even if a reset period (t
length in the write reset and read reset cycles, the
reset operation does take place.
DOUT
CLK
DIN
RW
CLK
RR
(n-1)
(n-1)
t
t
CKW
RH
t
t
CKW
t
RH
A
n cycle
n cycle
t
t
t
CKW
RS
DS
t
(n)
t
CKW
RS
(n)
RW
t
, t
DH
t
t
OH
A
RR
reset cycle
reset cycle
t
) is zero
RW
t
RR
SM5838AS
(0)
both the CLK rising edge setup time (t
time (t
cycle) can occur simultaneously with a write cycle
(read cycle). If the cycles are not simultaneous, then
the write reset cycle (read reset cycle) is completed
at the start of the next write cycle (read cycle).
t
t
RH
t
t
OH
A
RH
0 cycle
RH
0 cycle
). Note that a write reset cycle (read reset
t
t
RS
DS
t
(0)
RS
(0)
NIPPON PRECISION CIRCUITS—6
WE="L"
RE="L" , OE="L"
t
DH
t
t
OH
A
1 cycle
1 cycle
(1)
RS
(1)
) and hold