D7225G NEC, D7225G Datasheet - Page 23

• Manufacturer Part Number: D7225G
• Description: Search -----> UPD7225G
• Manufacturer: NEC

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7.
set to low, the PD7225 sets the /BUSY to low (this initializes the SCK counter and the data pointer to 0) in order to
perform internal processing. Therefore, after the PD7225 completes internal processing, the first bit (MSB) should
be input in synchronization with the /SCK after the /BUSY signal is set to high. The serial data is transferred to the
serial register in bit units at the rising edge of /SCK. Inputting eight serial clocks completes the transfer of all 8 bits of
data to the serial register. At the rising edge of the eighth serial clock, the /BUSY is set to low, and the status of the
C, /D pin is clocked in to specify whether the data is a command or data. Afterwards, the contents of the serial
register are clocked into the command/data register.
The /BUSY is set to low each time a byte of data is input. The /BUSY becomes high when the serial data is clocked
in from the serial register to the command/data register, so that the next serial data can be input.
must not be set to high while display data is being transferred (before eight clocks has elapsed.) If it becomes
necessary to interrupt serial data transfer when transferring two or more bytes of data due to an interrupt for the CPU
interrupt, execute the PAUSE TRANSFER command after checking that the byte has been transferred, then set /CS
to high. In this case, even if /CS is set to high, the contents of the data memory will not be transferred to the display
data latch.
this case, the contents of the data pointer are not cleared so that data write operation starts from the next data
memory address when serial data transfer is resumed (C, /D = 0).
Note
Serial data
Serial data is input to the SI pin with MSB first in synchronization with the serial clock in 8-bits units. When /CS is
When successively inputting 2 or more bytes of serial data, /CS must be set to low until all bytes of data are input.
When input of all serial data is complete, the data memory contents can be displayed by setting /CS to high. /CS
To resume serial data transfer, set /CS to low in the same way as when initiating a normal transfer. However, in
(SI pin)
/BUSY
SERIAL DATA INPUT
/SCK
C, /D
/CS
In a multi-chip system in which the /BUSY pins of chips are made a wired-OR connection, avoid setting the
/CS pins of two or more chips simultaneously.
High
impedance
D7
Figure 7-1. Inputting Byte
D6
Data Sheet S14308EJ6V0DS00
D5
D2
D1
D0
PD7225
High
impedance
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