TS256MDOM40V-S Transcend Information. Inc., TS256MDOM40V-S Datasheet - Page 7

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TS256MDOM40V-S

Manufacturer Part Number
TS256MDOM40V-S
Description
Transcend 40-pin Ide Flash Module
Manufacturer
Transcend Information. Inc.
Datasheet
Notes:
(1) Device address consists of -CS0, -CS1, and A[02::00]
(2) Data consists of D[15::00] (16-bit) or D[07::00] (8 bit)
(3) -IOCS16 is shown for PIO modes 0, 1 and 2. For other modes, this signal is ignored.
(4) The negation of IORDY by the device is used to extend the PIO cycle. The determination of whether the cycle is
Transcend Information Inc.
True IDE PIO Mode Timing Diagram
(4-3) Device drives IORDY low before t
to be extended is made by the host after t
of IORDY is described in the following three cases:
(4-1) Device never negates IORDY: No wait is generated.
(4-2) Device starts to drive IORDY low before t
generated.
T
cycles where a wait is generated and -IORD is asserted, the device shall place read data on D15-D00 for
t
T
T
RD
r
r
r
before causing IORDY to be asserted.
a
a
a
n
n
n
s
s
s
T
T
T
c
c
c
S
S
S
e
e
e
1
n
1
n
1
n
2
2
d
2
d
d
8
8
8
4
4
4
M
M
M
0
0
0
-
-
-
~
~
~
Figure 1: True IDE PIO Mode Timing Diagram
P
P
P
i
1
1
i
1
i
n
n
n
6
6
6
G
G
I
I
G
I
A
D
D
D
: wait generated. The cycle completes after IORDY is reasserted. For
D
D
D
A
E
E
E
from the assertion of -IORD or -IOWR. The assertion and negation
O
O
O
F
F
F
M
M
M
A
l
l
, but causes IORDY to be asserted before t
l
a
a
a
4
4
4
s
s
s
0
0
0
h
7
h
h
V
V
V
M
-
M
-
-
M
S
S
S
o
o
o
d
d
d
u
u
u
l
l
l
e
e
e
A
: No wait
Ver 1.2

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