TS256MDOM40V-S Transcend Information. Inc., TS256MDOM40V-S Datasheet - Page 10

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TS256MDOM40V-S

Manufacturer Part Number
TS256MDOM40V-S
Description
Transcend 40-pin Ide Flash Module
Manufacturer
Transcend Information. Inc.
Datasheet
commands. When this protocol is enabled, the Ultra DMA protocol shall be used instead of the Multiword
DMA protocol when these commands are issued by the host. This protocol applies to the Ultra DMA data
burst only. When this protocol is used there are no changes to other elements of the ATA protocol.
Notes: 1) The UDMA interpretation of this signal is valid only during an Ultra DMA data burst.
Several signal lines are redefined to provide different functions during an Ultra DMA data burst.
These lines assume their UDMA definitions when:
of -DMACK by the host at the termination of an Ultra DMA data burst.
Ultra DMA Mode Read/Write Timing Specification
1. an Ultra DMA mode is selected, and
2. a host issues a READ DMA, or a WRITE DMA command requiring data transfer, and
3. the device asserts (-)DMARQ, and
4. the host asserts (-)DMACK.
Transcend Information Inc.
These signal lines revert back to the definitions used for non-Ultra DMA transfers upon the negation
With the Ultra DMA protocol, the STROBE signal that latches data from D[15:00] is generated by the
Ultra DMA is an optional data transfer protocol used with the READ DMA, and WRITE DMA,
2) The UDMA interpretation of this signal is valid only during and Ultra DMA data burst during a DMA Read command.
3) The UDMA interpretation of this signal is valid only during an Ultra DMA data burst during a DMA Write command.
4) The HSTROBE and DSTROBE signals are active on both the rising and the falling edge.
5) Address lines 03 through 10 are not used in True IDE mode.
T
T
T
r
r
r
a
a
a
n
n
n
s
s
s
T
T
T
c
c
c
S
S
S
e
e
e
1
n
1
n
1
n
2
2
d
2
d
d
8
8
8
DDMARDY(W)
HDMARDY(R)
HSTROBE(W)
UDMA Signal
DSTROBE(R)
4
4
4
M
M
M
Card Select
ADDRESS
0
0
0
DMARQ
DMACK
INTRQ
STOP
DATA
CSEL
-
-
-
~
~
~
P
P
P
i
1
1
i
1
i
n
n
n
6
6
6
G
G
I
I
G
I
D
D
D
D
D
D
E
E
E
O
O
O
F
F
F
M
M
M
l
l
l
a
a
a
4
4
4
Output
Output
Output
s
s
s
Type
Input
Input
Input
Input
input
Input
0
Bidir
0
0
10
h
h
h
V
V
V
M
-
M
-
-
M
S
S
S
o
o
o
d
d
d
u
u
u
TRUE IDE MODE
HSTROBE(W)
-DDMARDY(W)
DSTROBE(R)
l
l
l
e
e
-HDMARDY
e
A[02:00]
-DMACK
DMARQ
D[15:00]
STOP
INTRQ
UDMA
-CSEL
-CS0
-CS1
1
5
1,2
1,2,4
1,3,4
1,3
Ver 1.2

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