AD640 Analog Devices, AD640 Datasheet - Page 8

• Manufacturer Part Number: AD640
• Description: DC-Coupled Demodulating 120 MHz Logarithmic Amplifier
• Manufacturer: Analog Devices

AD640
50 A/dB, or 1 mA per decade. This scaling parameter is
trimmed to absolute accuracy using a 2 kHz square wave. At
frequencies near the system bandwidth, the slope is reduced due
to the reduced output of the limiter stages, but it is still rela-
tively insensitive to temperature variations so that a simple ex-
ternal slope adjustment in restore scaling accuracy.
The intercept position bias generator (Figure 17) removes the
pedestal current from the summed detector outputs. It is ad-
justed during manufacture such that the output (flowing into
Pin 14) is 1 mA when a 2 kHz square-wave input of exactly
precisely 1 mV. The LOG COM output (Pin 13) is the comple-
ment of LOG OUT. It also has a 1 mV intercept, but with an
inverted slope of –1 mA/decade. Because its pedestal is very
large (equivalent to about 100 dB), its intercept voltage is not
guaranteed. The intercept positioning currents include a special
internal temperature compensation (ITC) term which can be
disabled by connecting Pin 8 to ground.
The logarithmic function of the AD640 is absolutely calibrated
to within 0.3 dB (or 15 A) for 2 kHz square-wave inputs of
showing the outputs at temperatures of –55 C, +25 C and
+125 C. While the slope and intercept are seen to be little af-
fected by temperature, there is a lateral shift in the endpoints of
the “linear” region of the transfer function, which reduces the
effective dynamic range. The cause of this shift is explained in
Fundamentals of Logarithmic Conversion section.
Figure 18. Logarithmic Output and Absolute Error vs. DC
or Square Wave Input at T
to Pins 1 and 20
The on chip attenuator can be used to handle input levels 20 dB
higher, that is, from 7.5 mV to 2 V for dc or square wave
inputs. It is specially designed to have a positive temperature
coefficient and is trimmed to position the intercept at 10 mV dc
(or –24 dBm for a sinusoidal input) over the full temperature
range. When using the attenuator the internal bias compensa-
tion should be disabled by grounding Pin 8. Figure 19 shows
the output at –55 C, +25 C, +85 C and +125 C for a single
AD640 with the attenuator in use; the curves overlap almost
perfectly, and the lateral shift in the transfer function does not
occur. Therefore, the full dynamic range is available at all
temperatures.
The output of the final limiter is available in differential form at
Pins 10 and 11. The output impedance is 75
either pin. For most input levels, this output will appear to have
10 mV is applied to the AD640. This places the dc intercept at
1 mV to 100 mV, and to within 1 dB between 750 V and
200 mV. Figure 18 is a typical plot of the dc transfer function,
–0.5
2.5
2.0
1.5
1.0
0.5
0
0.1
1.0
INPUT VOLTAGE – mV
A
10.0
= –55 C, +25 C, Input Direct
+125 C
–55 C
+25 C
+125 C
100.0
–55 C
to ground from
+25 C
1000.0
2
1
0
–1
–2
–8–
Figure 19. Logarithmic Output and Absolute Error vs. DC
or Square Wave Input at T
+125 C, Input via On-Chip Attenuator
roughly a square waveform. The signal path may be extended
using these outputs (see OPERATION OF CASCADED
AD640s). The logarithmic outputs from two or more AD640s
can be directly summed with full accuracy.
A pair of 1 k applications resistors, RG1 and RG2 (Figure 17)
are accessed via Pins 15, 16 and 17. These can be used to con-
vert an output current to a voltage, with a slope of 1 V/decade
(using one resistor), 2 V/decade (both resistors in series) or
0.5 V/decade (both in parallel). Using all the resistors from two
AD640s (for example, in a cascaded configuration) ten slope
options from 0.25 V to 4 V/decade are available.
FUNDAMENTALS OF LOGARITHMIC CONVERSION
The conversion of a signal to its equivalent logarithmic value
involves a nonlinear operation, the consequences of which can be
very confusing if not fully understood. It is important to realize
from the outset that many of the familiar concepts of linear
circuits are of little relevance in this context. For example, the
incremental gain of an ideal logarithmic converter approaches
infinity as the input approaches zero. Further, an offset at the
output of a linear amplifier is simply equivalent to an offset at
the input, while in a logarithmic converter it is equivalent to a
change of amplitude at the input—a very different relationship.
We assume a dc signal in the following discussion to simplify the
concepts; ac behavior and the effect of input waveform on cali-
bration are discussed later. A logarithmic converter having a
voltage input V
tion of the form
where Vy and Vx are fixed voltages which determine the scaling
of the converter. The input is divided by a voltage because the
argument of a logarithm has to be a simple ratio. The logarithm
must be multiplied by a voltage to develop a voltage output.
These operations are not, of course, carried out by explicit com-
putational elements, but are inherent in the behavior of the
converter. For stable operation, V
sound design criteria and rendered stable over wide temperature
and supply voltage extremes. This aspect of RF logarithmic
amplifier design has traditionally received little attention.
When V
the Intercept Voltage, because a graph of V
—ideally a straight line—crosses the horizontal axis at this point
V
OUT
–0.5
2.5
2.0
1.5
1.0
0.5
IN
0
= V
1
= V
Y
X
IN
, the logarithm is zero. V
LOG (V
and output V
+85 C
10
IN
INPUT VOLTAGE – mV
+125 C
+25 C
/V
X
A
)
= –55 C, +25 C, +85 C and
OUT
100
X
must satisfy a transfer func-
and V
–55 C
X
Y
OUT
1000
is, therefore, called
must be based on
versus LOG (V
Equation (1)
10000
1
0
–1
–2
REV. C
IN
)