AD640 Analog Devices, AD640 Datasheet

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AD640

Manufacturer Part Number
AD640
Description
DC-Coupled Demodulating 120 MHz Logarithmic Amplifier
Manufacturer
Analog Devices
Datasheet

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PRODUCT DESCRIPTION
The AD640 is a complete monolithic logarithmic amplifier. A single
AD640 provides up to 50 dB of dynamic range for frequencies
from dc to 120 MHz. Two AD640s in cascade can provide up to
95 dB of dynamic range at reduced bandwidth. The AD640 uses a
successive detection scheme to provide an output current propor-
tional to the logarithm of the input voltage. It is laser calibrated to
close tolerances and maintains high accuracy over the full military
temperature range using supply voltages from 4.5 V to 7.5 V.
The AD640 comprises five cascaded dc-coupled amplifier/limiter
stages, each having a small signal voltage gain of 10 dB and a –3 dB
bandwidth of 350 MHz. Each stage has an associated full-wave
detector, whose output current depends on the absolute value of its
input voltage. The five outputs are summed to provide the video
output (when low-pass filtered) scaled at 1 mA per decade (50 A
per dB). On chip resistors can be used to convert this output cur-
rent to a voltage with several convenient slope options. A balanced
*Protected under U.S. patent number 4,990,803.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
FEATURES
Complete, Fully Calibrated Monolithic System
Five Stages, Each Having 10 dB Gain, 350 MHz BW
Direct Coupled Fully Differential Signal Path
Logarithmic Slope, Intercept and AC Response are
Dual Polarity Current Outputs Scaled 1 mA/Decade
Voltage Slope Options (1 V/Decade, 100 mV/dB, etc.)
Low Power Operation (Typically 220 mW at
Low Cost Plastic Packages Also Available
APPLICATIONS
Radar, Sonar, Ultrasonic and Audio Systems
Precision Instrumentation from DC to 120 MHz
Power Measurement with Absolute Calibration
Wide Range High Accuracy Signal Compression
Alternative to Discrete and Hybrid IF Strips
Replaces Several Discrete Log Amp ICs
Stable Over Full Military Temperature Range
ATN COM
ATN COM
ATN OUT
ATN LO
SIG +IN
SIG –IN
COM
18
19
20
1
2
3
4
30
27
270
AMPLIFIER/LIMITER
ATN IN
RG1
17
5
FULL-WAVE
DETECTOR
10dB
1k
BL1
6
RG0
16
AMPLIFIER/LIMITER
FUNCTIONAL BLOCK DIAGRAM
1k
GAIN BIAS REGULATOR
5 V)
FULL-WAVE
RG2
DETECTOR
15
10dB
AMPLIFIER/LIMITER
LOG OUT
14
signal output at +50 dB (referred to input) is provided to operate
AD640s in cascade.
The logarithmic response is absolutely calibrated to within 1 dB
for dc or square wave inputs from 0.75 mV to 200 mV, with
an intercept (logarithmic offset) at 1 mV dc. An integral X10
attenuator provides an alternative input range of 7.5 mV to
The AD640B is specified for the industrial temperature range of
–40 C to +85 C and the AD640T, available processed to MIL-
STD-883B, for the military range of –55 C to +125 C. Both are
available in 20-lead side-brazed ceramic DIPs or leadless chip
carriers (LCC). The AD640J is specified for the commercial
temperature range of 0 C to +70 C, and is available in both
20-lead plastic DIP (N) and PLCC (P) packages.
This device is now available to Standard Military Drawing
(DESC) number 5962-9095501MRA and 5962-9095501M2A.
PRODUCT HIGHLIGHTS
1. Absolute calibration of a wideband logarithmic amplifier is
2. Advanced design results in unprecedented stability over the
3. The fully differential signal path greatly reduces the risk of
4. Differential interfaces also ensure that the appropriate ground
5. The dc-coupled signal path eliminates the need for numerous
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
2 V dc. Scaling is also guaranteed for sinusoidal inputs.
FULL-WAVE
DETECTOR
120 MHz Logarithmic Amplifier
unique. The AD640 is a high accuracy measurement device,
not simply a logarithmic building block.
full military temperature range.
instability due to inadequate power supply decoupling and
shared ground connections, a serious problem with com-
monly used unbalanced designs.
connection can be chosen for each signal port. They further
increase versatility and simplify applications. The signal input
impedance is ~500 k in shunt with ~2 pF.
interstage coupling capacitors and simplifies logarithmic
conversion of subsonic signals.
10dB
LOG COM
13
–V
DC-Coupled Demodulating
7
S
AMPLIFIER/LIMITER
FULL-WAVE
INTERCEPT POSITIONING BIAS
DETECTOR
World Wide Web Site: http://www.analog.com
10dB
SLOPE BIAS REGULATOR
AMPLIFIER/LIMITER
FULL-WAVE
DETECTOR
© Analog Devices, Inc., 1999
10dB
AD640*
(continued on page 4)
12
11
10
9
8
BL2
+V
SIG +OUT
SIG –OUT
ITC
S

Related parts for AD640

AD640 Summary of contents

Page 1

... The AD640 is a complete monolithic logarithmic amplifier. A single AD640 provides dynamic range for frequencies from dc to 120 MHz. Two AD640s in cascade can provide dynamic range at reduced bandwidth. The AD640 uses a successive detection scheme to provide an output current propor- tional to the logarithm of the input voltage ...

Page 2

... T 3 MAX = 4 7 1.0 3 0.4 2 0.6 3 MAX 1.2 3.5 4.5 7 MAX MAX –2– AD640B AD640T Typ Max Min Typ Max /V | for 200 500 500 50 200 50 200 0.8 0.8 300 +0.3 –2 +0 300 ...

Page 3

... Using the circuit of Figure 27, using cascaded AD640s and offset nulling. Input is sinusoidal, 0 dBm For a sinusoidal signal (see EFFECT OF WAVEFORM ON INTERCEPT). Pin 8 on second AD640 must be grounded to ensure temperature stability of intercept for dual AD640 system. 12 Using the circuit of Figure 24, using single AD640 and offset nulling. Input is sinusoidal, 0 dBm Using the circuit of Figure 32, using cascaded AD640s and attenuator ...

Page 4

... Ambient Temperature Range, Rated Performance Industrial, AD640B . . . . . . . . . . . . . . . . . . . – +85 C Military, AD640T . . . . . . . . . . . . . . . . . . . – +125 C Commercial, AD640J . . . . . . . . . . . . . . . . . . . +70 C Lead Temperature Range (Soldering 60 sec +300 C *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied ...

Page 5

... INPUT VOLTAGE – mV (EITHER SIGN) Figure 7. DC Logarithmic Transfer Function and Error Curve for Single AD640 REV. C Typical DC Performance Characteristics–AD640 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 –60 –40 – 100 120 140 TEMPERATURE – C Figure 2. Intercept Voltage vs. X Temperature 14 13 ...

Page 6

... Figure 14. Intercept Level (dBm) vs. Frequency (Cascaded AD640s – Sinusoidal Input) Figure 15. Baseband Pulse Response of Cascaded AD640s, Inputs of 0.2 mV and 200 mV –6– +125 C +125 C +25 C –55 C +125 C +25 C +125 C –55 C AD640 FREQUENCY = 60MHz –55 C – ...

Page 7

... Figure simplified schematic of one stage of the AD640. All transistors in the basic cell operate at near zero collector to base voltage and low bias currents, resulting in low levels of ther- mally induced distortion ...

Page 8

... Pin 14 when a 2 kHz square-wave input of exactly applied to the AD640. This places the dc intercept at precisely 1 mV. The LOG COM output (Pin 13) is the comple- ment of LOG OUT. It also has intercept, but with an inverted slope of – ...

Page 9

... Note that this lower limit is not determined by the intercept voltage the design. When using two AD640s in cascade, input offset Equation (2) voltage and wideband noise are the major limitations to low level accuracy. Offset can be eliminated in various ways. Noise can only be reduced by lowering the system bandwidth, using a filter between the two devices ...

Page 10

... SIGNAL MAGNITUDE AD640 is a calibrated device. It is, therefore, important to be clear in specifying the signal magnitude under all waveform conditions. For dc or square wave inputs there is, of course, no ambiguity. Bounded periodic signals, such as sinusoids and ...

Page 11

... Active Current-to-Voltage Conversion Equation (6) The compliance at LOG OUT limits the available output volt- age swing. The output of the AD640 may be converted to a larger, buffered output voltage by the addition of an operational amplifier connected as a current-to-voltage (transresistance) stage, as shown in Figure 21. Using feedback resistor (R2) the 50 A/dB output at LOG OUT is converted to a volt- age having a slope of +100 mV/dB, that is per decade ...

Page 12

... Pin l. The residual offset is then due to the bias current offset, which is typically under 1 A, causing an extra offset uncertainty of 100 V in this example. For a single AD640 this will rarely be troublesome, but in some applications it may need to be nulled out, along with the internal voltage offset component. This may be achieved by adding an adjustable voltage 250 V at the unused input ...

Page 13

... It may occasionally be desirable to attenuate the signal even further. For example, the source may have a full-scale value and since the basic range of the AD640 extends only to 200 mV dc, an attenuation factor of 50 might be chosen. This may be achieved either by using an independent external attenuator or more simply by adding a resistor in series with ATN IN (Pin 5) ...

Page 14

... Hz. The closed loop high-pass corner (for small signals) is, therefore, at 1.35 MHz. Bandwidth/Dynamic Range Trade-Offs The first stage noise of the AD640 is 2 nV/ Hz (short circuited input) and the full bandwidth of the cascaded ten stages is about 150 MHz. Thus, the noise referred to the input is 24.5 V rms, or – ...

Page 15

... In this application choke (L1) prevents the transmission of dc offset from the first to the sec- ond AD640. One or two turns in a ferrite core will generally suffice for operation at frequencies above 30 MHz. For ex- ample, one complete loop of 20 gauge wire through the two holes in a Fair-Rite type 2873002302 core provides an inductance which presents an impedance of 1 ...

Page 16

... U1 and U2 (Figure 32). To provide operation down to low frequencies, dc coupling is used at the interface between AD640s and the input offset is nulled by a feedback circuit. Using values of 0. the interstage filter formed by capaci- tors C1 and C2, the hf corner occurs at about 100 kHz. U3 (AD712) forms a 4-pole 35 Hz low-pass filter ...

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