ISL6420 Intersil Corporation, ISL6420 Datasheet - Page 13

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ISL6420

Manufacturer Part Number
ISL6420
Description
Advanced Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
Manufacturer
Intersil Corporation
Datasheet

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Over-Temperature Protection
The IC is protected against overtemperature conditions.
When the junction temperature exceeds 150°C, the PWM
shuts off. Normal operation is resumed when the junction
temperature is cooled down to 130°C.
Shutdown
When ENSS pin is below 1V, the regulator is disabled with
the PWM output drivers three-stated. When disabled, the IC
power will be reduced.
Under-Voltage
If the voltage on the FB pin is less than 15% of the reference
voltage for 8 consecutive PWM cycles, then the circuit enters
into soft start hiccup mode. This mode is identical to the over
current hiccup mode.
Overvoltage Protection
If the voltage on the FB pin exceeds the reference voltage by
15%, the lower gate driver is turned on continuously to
discharge the output voltage. If the over voltage condition
continues for 32 consecutive PWM cycles, then the chip is
turned off with the gate drivers three-stated. The voltage on
the FB pin will fall and reach the 15% under voltage
threshold. After 8 clock cycles, the chip will enter soft start
hiccup mode. This mode is identical to the over current
hiccup mode.
Gate Control Logic
The gate control logic translates generated PWM control
signals into the MOSFET gate drive signals providing
necessary amplification, level shifting and shoot-through
protection. Also, it has functions that help optimize the IC
performance over a wide range of operational conditions.
Since MOSFET switching time can vary dramatically from
type to type and with the input voltage, the gate control logic
provides adaptive dead time by monitoring the gate-to-
source voltages of both upper and lower MOSFETs. The
lower MOSFET is not turned on until the gate-to-source
voltage of the upper MOSFET has decreased to less than
approximately 1V. Similarly, the upper MOSFET is not turned
on until the gate-to-source voltage of the lower MOSFET has
decreased to less than approximately 1V. This allows a wide
variety of upper and lower MOSFETs to be used without a
concern for simultaneous conduction, or shoot-through.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
13
ISL6420
possible using ground plane construction or single point
grounding.
Figure 12 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be part
of ground or power plane in a printed circuit board. The
components shown in Figure 12 should be located as close
together as possible. Please note that the capacitors C
and C
Locate the ISL6420 within 3 inches of the MOSFETs, Q1 and
Q2. The circuit traces for the MOSFETs’ gate and source
connections from the ISL6420 must be sized to handle up to
2A peak current.
Figure 13 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, C
close to the SS pin because the internal current source is
only 30µA. Provide local V
GND pins. Locate the capacitor, C
to the BOOT and PHASE pins.
SS/EN
FIGURE 12. PRINTED CIRCUIT BOARD POWER AND
FIGURE 13. PRINTED CIRCUIT BOARD SMALL SIGNAL
C
ISL6420
SS
O
each represent numerous physical capacitors.
ISL6420
UGATE
PHASE
LGATE
GND
GND
GROUND PLANES OR ISLANDS
LAYOUT GUIDELINES
PHASE
C
VCC
BOOT
BOOT
+5V
CC
V
Q2
Q1
RETURN
IN
C
decoupling between VCC and
VCC
D1
D2
BOOT
C
as close as practical
Q1
+V
IN
Q2
IN
L
O
L
C
O
C
O
O
V
OUT
V
IN
ss
OUT

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