ISL6261 Intersil, ISL6261 Datasheet - Page 6

• Manufacturer Part Number: ISL6261
• Description: Single Phase Core Regulator
• Manufacturer: Intersil

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Functional Pin Description
FDE
Forced diode emulation enable signal. Logic high of FDE
with logic low of DPRSTP# forces the ISL6261 to operate in
diode emulation mode with an increased VW-COMP voltage
window.
PGD_IN
Digital Input. Suggest connecting to MCH_PWRGD, which
indicates that VCC_MCH voltage is within regulation.
RBIAS
A 147K resistor to VSS sets internal current reference.
VR_TT#
Thermal overload output indicator with open-drain output.
Over-temperature pull-down resistance is 10.
NTC
Thermistor input to VR_TT# circuit and a 60µA current
source is connected internally to this pin.
SOFT
A capacitor from this pin to GND pin sets the maximum slew
rate of the output voltage. The SOFT pin is the non-inverting
input of the error amplifier.
OCSET
Overcurrent set input. A resistor from this pin to VO sets
DROOP voltage limit for OC trip. A 10µA current source is
connected internally to this pin.
6
PGD_IN
VR_TT#
OCSET
RBIAS
COMP
SOFT
NTC
FDE
VW
FB
10
1
2
3
4
5
6
7
8
9
40
11
39
12
38
13
37
14
ISL6261
(BOTTOM)
GND PAD
36
15
35
16
VW
A resistor from this pin to COMP programs the switching
frequency (eg. 6.81K = 300kHz).
COMP
The output of the error amplifier.
FB
The inverting input of the error amplifier.
VDIFF
The output of the differential amplifier.
VSEN
Remote core voltage sense input.
RTN
Remote core voltage sense return.
DROOP
The output of the droop amplifier. DROOP-VO voltage is the
droop voltage.
DFB
The inverting input of the droop amplifier.
VO
An input to the IC that reports the local output voltage.
34
17
33
18
32
19
31
20
30
29
28
27
26
25
24
23
22
21
VID2
VID1
VID0
VCCP
LGATE
VSSP
PHASE
UGATE
BOOT
NC
September 27, 2006
FN9251.1