ISL6261 Intersil, ISL6261 Datasheet - Page 15

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ISL6261

Manufacturer Part Number
ISL6261
Description
Single Phase Core Regulator
Manufacturer
Intersil
Datasheet

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Protection
The ISL6261 provides overcurrent (OC), overvoltage (OV),
undervoltage (UV) and over-temperature (OT) protections as
shown in Table 3.
Overcurrent is detected through the droop voltage, which is
designed as described in the “Component Selection and
Application” section. The OCSET resistor sets the
overcurrent protection level. An overcurrent fault will be
declared when the droop voltage exceeds the overcurrent
set point for more than 120µs. A way-overcurrent fault will be
declared in less than 2µs when the droop voltage exceeds
twice the overcurrent set point. In both cases, the UGATE
and LGATE outputs will be tri-stated and PGOOD will go low.
The over-current condition is detected through the droop
voltage. The droop voltage is equal to I
R
of the OCSET pin and creates a voltage drop across R
(shown as R
the droop voltage exceeds the voltage across R
Equation 1 gives the selection of R
For example: The desired over current trip level, I
R
Undervoltage protection is independent of the overcurrent
limit. A UV fault is declared when the output voltage is lower
than (VID-300mV) for more than 1ms. The gate driver
outputs will be tri-stated and PGOOD will go low. Note that a
practical core regulator design usually trips OC before it trips
UV.
There are two levels of overvoltage protection and response.
An OV fault is declared when the output voltage exceeds the
VID by +200mV for more than 1ms. The gate driver outputs
will be tri-stated and PGOOD will go low. The inductor
current will decay through the low-side FET body diode.
Toggling of VR_ON or bringing VDD below 4V will reset the
fault latch. A way-overvoltage (WOV) fault is declared
immediately when the output voltage exceeds 1.7V. The
ISL6261 will latch PGOOD low and turn on the low-side
FETs. The low-side FETs will remain on until the output
voltage drops below approximately 0.85V, then all the FETs
are turned off. If the output voltage again rises above 1.7V,
the protection process repeats. This mechanism provides
maximum protection against a shorted high-side FET while
preventing the output from ringing below ground. Toggling
VR_ON cannot reset the WOV protection; recycling VDD will
reset it. The WOV detector is active all the time, even when
other faults are declared, so the processor is still protected
against the high-side FET leakage while the FETs are
commanded off.
The ISL6261 has a thermal throttling feature. If the voltage
on the NTC pin goes below the 1.2V over-temperature
R
droop
droop
OCSET
is the load line slope. A 10μA current source flows out
is 2.1mΩ, Equation 1 gives R
=
I
OC
10
10
in Figure 2). Overcurrent is detected when
×
μ
R
A
droop
15
OCSET
OCSET
core
.
×R
= 6.3k.
droop
OCSET
oc
, where
, is 30A,
OCSET
.
(EQ. 1)
ISL6261
threshold, the VR_TT# pin is pulled low indicating the need
for thermal throttling to the system oversight processor. No
other action is taken within the ISL6261.
Component Selection and Application
Soft-Start and Mode Change Slew Rates
The ISL6261 commands two different output voltage slew
rates for various modes of operation. The slow slew rate
reduces the inrush current during startup and the audible
noise during the entry and the exit of Deeper Sleep Mode.
The fast slew rate enhances the system performance by
achieving active mode regulation quickly during the exit of
Deeper Sleep Mode. The SOFT current is bidirectional ⎯
charging the SOFT capacitor when the output voltage is
commanded to rise, and discharging the SOFT capacitor
when the output voltage is commanded to fall.
Figure 5 shows the circuitry on the SOFT pin. The SOFT pin,
the non-inverting input of the error amplifier, is connected to
ground through capacitor C
source connected to the SOFT pin to charge or discharge
C
connecting or disconnecting another internal current source
I
Startup or Active mode, and the logic state on the
DPRSLPVR pin. The SOFT-START CURRENT section of
the Electrical Specification Table shows the specs of these
two current sources.
I
changes. When connected to the SOFT pin, I
get a larger current, labelled I
Specification Table, on the SOFT pin. I
with a minimum of 175μA.
The IMVP-6
associated with regulating the output voltage. SLEWRATE,
Z
SS
SOFT
to the SOFT pin, depending on the state of the system, i.e.
FIGURE 5. SOFT PIN CURRENT SOURCES FOR FAST AND
is 41μA typical and is used during startup and mode
. The ISL6261 controls the output voltage slew rate by
C
®
I
SOFT
SLOW SLEW RATES
SS
specification reveals the critical timing
V
REF
SOFT
GV
I
. I
in the Electrical
Z
SS
Ampliflier
Internal to
Error
is an internal current
ISL6261
GV
is typically 200μA
Z
September 27, 2006
adds to I
FN9251.1
SS
to

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