ISL6261 Intersil, ISL6261 Datasheet - Page 3

• Manufacturer Part Number: ISL6261
• Description: Single Phase Core Regulator
• Manufacturer: Intersil

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Electrical Specifications
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +7V
Battery Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT-PHASE). . . . . . . . . -0.3V to +7V(DC)
Phase Voltage (PHASE) . . . . . . . . . -7V (<20ns Pulse Width, 10µJ)
UGATE Voltage (UGATE) . . . . . . . . . . PHASE-0.3V (DC) to BOOT
LGATE Voltage (LGATE) . . . . . . . . . . . . . . -0.3V (DC) to VDD+0.3V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD +0.3V)
Open Drain Outputs, PGOOD, VR_TT# . . . . . . . . . . . . -0.3 to +7V
HBM ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>3kV
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
INPUT POWER SUPPLY
+5V Supply Current
+3.3V Supply Current
Battery Supply Current at VIN pin
POR (Power-On Reset) Threshold
SYSTEM AND REFERENCES
System Accuracy
RBIAS Voltage
Boot Voltage
Maximum Output Voltage
Minimum Output Voltage
VID Off State
CHANNEL FREQUENCY
Nominal Channel Frequency
Adjustment Range
AMPLIFIERS
Droop Amplifier Offset
Error Amp DC Gain (Note 3)
1. θ
2. For θ
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +9V(<10ns)
. . . . . . . . . . . . . .PHASE-5V (<20ns Pulse Width, 10µJ) to BOOT
. . . . . . . . . . . . . . . . -2.5V (<20ns Pulse Width, 5µJ) to VDD+0.3V
Brief TB379.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
JC
PARAMETER
, the “case temp” location is the center of the exposed metal pad on the package underside.
3
V
DD
= 5V, T
V
V
SYMBOL
(V
CC_CORE
CC_CORE
%Error
R
V
(max)
POR
POR
(min)
cc_core
I
I
I
RBIAS
BOOT
f
A
VDD
3V3
VIN
SW
V0
A
r
f
= -10°C to +100°C, Unless Otherwise Specified.
)
VR_ON = 3.3V
VR_ON = 0V
No load on CLK_EN# pin
VR_ON = 0, VIN = 25V
V
V
No load, close loop, active mode,
T
VID = 0.75-1.5V
VID = 0.5-0.7375V
VID = 0.3-0.4875V
R
VID = [0000000]
VID = [1100000]
VID = [1111111]
R
V
A
DD
DD
comp
RBIAS
FSET
= 0°C to +100°C,
Rising
Falling
= 2V
= 7kΩ,
= 147kΩ
ISL6261
TEST CONDITIONS
Thermal Information
Thermal Resistance (Typical)
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
Recommended Operating Conditions
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+5V ±5%
Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to 21V
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +100°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .-10°C to +125°C
6x6 QFN Package (Notes 1, 2) . . . . . . 33
7x7 QFN Package (Notes 1, 2) . . . . . . 30
1.188
3.85
1.45
MIN
-0.5
-0.3
200
-15
-8
-
-
-
-
-
-
-
-
-
-
θ
TYP
4.35
1.47
JA
333
3.1
4.1
1.2
1.5
0.3
0.0
90
-
-
-
-
-
-
-
(°C/W)
1.212
MAX
1.49
500
3.6
4.5
0.5
0.3
15
1
1
1
8
-
-
-
-
-
-
September 27, 2006
θ
JC
UNITS
FN9251.1
5.5
5.5
(°C/W)
kHz
kHz
mA
mV
mV
mV
µA
µA
µA
dB
%
V
V
V
V
V
V
V