ISL12025 Intersil Corporation, ISL12025 Datasheet - Page 17

• Manufacturer Part Number: ISL12025
• Description: Real-Time Clock/Calendar
• Manufacturer: Intersil Corporation

Device Addressing
Following a start condition, the master must output a Slave
Address Byte. The first four bits of the Slave Address Byte
specify access to either the EEPROM array or to the CCR.
Slave bits ‘1010’ access the EEPROM array. Slave bits
‘1101’ access the CCR.
When shipped from the factory, EEPROM array is
UNDEFINED, and should be programmed by the customer
to a known state.
ARRAY
FROM TRANSMITTER
CCR
DATA OUTPUT
FROM RECEIVER
DATA OUTPUT
SCL FROM
MASTER
FIGURE 19. SLAVE ADDRESS, WORD ADDRESS, AND DATA BYTES (64 BYTE PAGES)
A7
1
1
D7
0
SDA
SCL
DEVICE IDENTIFIER
17
A6
0
1
D6
0
FIGURE 18. ACKNOWLEDGE RESPONSE FROM RECEIVER
START
A5
D5
FIGURE 17. VALID START AND STOP CONDITIONS
1
0
0
A4
D4
0
1
0
START
1
A3
D3
1
0
ISL12025
A2
D2
1
0
Bit 3 through Bit 1 of the slave byte specify the device select
bits. These are set to ‘111’.
The last bit of the Slave Address Byte defines the operation
to be performed. When this R/W bit is a one, then a read
operation is selected. A zero selects a write operation. See
Figure 19.
After loading the entire Slave Address Byte from the SDA
bus, the ISL12025 compares the device identifier and device
select bits with ‘1010111’ or ‘1101111’. Upon a correct
A1
D1
1
0
R/W
A8
A0
D0
8
STOP
ACKNOWLEDGE
SLAVE ADDRESS BYTE
WORD ADDRESS 1
WORD ADDRESS 0
DATA BYTE
9
BYTE 0
BYTE 3
BYTE 1
BYTE 2
October 18, 2006
FN6371.1