MT9V012 Micron, MT9V012 Datasheet - Page 27

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MT9V012

Manufacturer Part Number
MT9V012
Description
1/6-Inch VGA CMOS Digital Image Sensor
Manufacturer
Micron
Datasheet

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Table 6:
PDF: 814eb99f/Source: 8175e929
MT9V012_2.fm - Rev. B 2/05 EN
0x22 (34) Show Control
0x23 (35) Flash Control
12:11
Bit
2:0
6:4
7:0
10
13
14
3
7
8
9
8
9
Number Dark
Rows
Reserved
Dark Start
Address
Show Dark and
Extra Rows
Read Dark
Columns
Show Dark
Columns
Xenon Count
LED Flash
Every Frame
End of Reset
Frame Delay
Xenon Flash
Triggered
Register Description (continued)
A value of n causes (n + 1) dark rows to be read out at the
beginning of each frame when dark-row readout is enabled
(bit 3).
This read/write bit has no function.
The start address for the dark rows. Must be set so all dark-
row readouts fall in the address space 7:0.
When set, the programmed dark rows will be output before
the active window. In addition, two additional rows will be
output before the active window and two additional rows
will be output after the active window. FRAME_VALID will
thus be asserted earlier than normal. This has no effect on
integration time or frame rate.
Enables dark column readout, columns 21:2, for use in the
row-wise noise correction algorithm. When disabled, an
arbitrary number of dark columns can be read out by
including them in the active image. Enabling the dark
columns increases the minimum value for horizontal
blanking but does not affect the row time.
When set, the 20 dark columns will be output before the
active pixels in a line. There is an idle period of two pixels
between dark column readout and active image readout.
Therefore, when set, LINE_VALID will be asserted twenty-
two pixel times earlier than normal, and the horizontal
blanking time will be decreased by the same amount.
Length of flash pulse when Xenon flash is enabled. The
value specifies the length in units of 1,024 x PIXCLK cycle
increments. When the Xenon count is set to its maximum
value (0xFF), the flash pulse will automatically be truncated
prior to the readout of the first row, giving the longest pulse
possible.
Enable LED flash. When set, the FLASH output will assert
prior to the start of the resetting of a frame and will remain
asserted until the end of the frame readout.
1 = Flash should be enabled every frame.
0 = Flash should be enabled for 1 frame only.
1 = In Xenon mode, the flash is triggered after resetting a
frame.
0 = In Xenon mode, the flash is triggered after a frame
readout.
Flash pulse delay measured in frames.
Enable Xenon flash. When set, the FLASH output will assert
for the programmed period (bits [7:0]) during vertical
blanking. This is achieved by keeping the integration time
equal to one frame, and the pulse width less than the
vertical blanking time.
Indicates that the FLASH output was asserted for the current
frame. Read-only.
Bit Description
MT9V012 - 1/6-Inch VGA CMOS Digital Image Sensor
27
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Default
(hex)
7
1
0
0
1
0
8
0
1
1
0
0
0
©2004 Micron Technology, Inc. All rights reserved.
to Frame
Sync’d
Start
N
N
N
N
N
N
N
N
N
N
Y
Y
Preliminary
Registers
Frame
Bad
Y??
N??
Y
Y
N
N
Y
N
N
N
N
N

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