IDT2305-1HDCGGI Integrated Device Technology, Inc., IDT2305-1HDCGGI Datasheet - Page 8
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IDT2305-1HDCGGI
Manufacturer Part Number
IDT2305-1HDCGGI
Description
General PLL: 3.3V Zero Delay Clock Buffer
Manufacturer
Integrated Device Technology, Inc.
Datasheet
1.IDT2305-1HDCGGI.pdf
(10 pages)
NOTES:
1. Duty Cycle is taken from typical chip measured at 1.4V.
2. I
IDT2305
3.3V ZERO DELAY CLOCK BUFFER
V = Supply Voltage (V); f = Frequency (Hz))
140
120
100
DD
44
40
60
56
52
46
42
40
44
42
40
80
60
20
58
54
50
48
60
56
52
46
58
54
50
48
0
data is calculated from I
3
20
0
(for 30pf loads over frequency - 3.3V, 25C)
(for 30pf loads over frequency - 3.3V, 25C)
(for 30pf loads over temperature - 3.3V)
3.1
40
Number of Loaded Outputs
I
DD
vs Number of Loaded Outputs
Duty Cycle vs Frequency
2
3.2
60
Duty Cycle vs V
Frequency (M Hz)
V
DD
3.3
80
DD
4
= I
(V)
CORE
DD
3.4
100
+ nCVf, where I
6
3.5
120
3.6
140
8
CORE
33MH z
33MH z
-40C
is the unloaded current. (n = Number of outputs; C = Capacitance load per output (F);
66MHz
100MHz
66MHz
100MHz
0C
25C
70C
85C
8
140
120
100
44
44
42
40
60
56
52
46
42
40
40
60
56
52
46
58
54
50
48
80
60
20
58
54
50
48
COMMERCIALAND INDUSTRIAL TEMPERATURE RANGES
0
20
0
3
(for 10pF loads over tem perature - 3.3V)
(for 10pF load s over frequency - 3.3V, 25C )
(for 10pF loads over frequency - 3.3V, 25C )
40
3.1
Number of Loaded Outputs
I
D D
D uty C ycle vs Fre qu ency
2
vs N um ber of Loade d O utputs
Frequency (M Hz)
60
3.2
Du ty C ycle vs V
V
DD
80
3.3
4
(V)
100
3.4
D D
6
120
3.5
140
3.6
8
-40C
33MHz
33MH z
0C
25C
70C
85C
66MH z
100M Hz
133M Hz
66MHz
100MHz