IDT2305-1HDCGGI Integrated Device Technology, Inc., IDT2305-1HDCGGI Datasheet

IDT2305-1HDCGGI

Manufacturer Part Number

IDT2305-1HDCGGI

Description

General PLL: 3.3V Zero Delay Clock Buffer

Manufacturer

Integrated Device Technology, Inc.

Datasheet

1.IDT2305-1HDCGGI.pdf (10 pages)

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IDT2305

3.3V ZERO DELAY CLOCK BUFFER

Phase-Lock Loop Clock Distribution

10MHz to 133MHz operating frequency

Distributes one clock input to one bank of five outputs

Zero Input-Output Delay

Output Skew < 250ps

Low jitter < 200ps cycle-to-cycle

IDT2305-1 for Standard Drive

IDT2305-1H for High Drive

Industrial Temperature Available

No external RC network required

Operates at 3.3V V

Available in SOIC package

Power Down Mode

2001 Integrated Device Technology, Inc.

REF

PLL

3.3V ZERO DELAY

CLOCK BUFFER

Control

Logic

designed to address high-speed clock distribution applications. The zero

delay is achieved by aligning the phase between the incoming clock and

the output clock, operable within the range of 10 to 133MHz.

reference input, and drives out five low skew clocks. The -1H version of this

device operates, up to 133MHz frequency and has a higher drive than the

-1 device. All parts have on-chip PLLs which lock to an input clock on the

REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT

pad. In the absence of an input clock, the IDT2305 enters power down. In

this mode, the device will draw less than 25

and the PLL is not running, resulting in a significant reduction of power.

operation.

The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer,

The IDT2305 is an 8-pin version of the IDT2309. IDT2305 accepts one

The IDT2305 is characterized for both Industrial and Commercial

COMMERCIALAND INDUSTRIAL TEMPERATURE RANGES

µA,

the outputs are tri-stated,

CLK1

CLK2

CLK3

CLK4

CLKOU T

IDT2305

DSC-5174/2

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