PIC24H Microchip Technology, PIC24H Datasheet - Page 69

• Manufacturer Part Number: PIC24H
• Description: Flash Programming Specification
• Manufacturer: Microchip Technology

TABLE 6-1:
© 2007 Microchip Technology Inc.
Step 7: Load W0:W5 with the next 4 words of packed programming executive code and initialize W6 for
Step 8: Set the read pointer (W6) and load the (next four write) latches.
Step 9: Repeat Steps 7-8 sixteen times to load the write latches for the 64 instructions.
Step 10: Initiate the programming cycle.
Step 11: Wait for the Row Program operation to complete.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
-
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
programming. Programming starts from the base of executive memory (0x800000) using W6 as a read
pointer and W7 as a write pointer.
2<LSW0>0
2<MSB1:MSB0>1
2<LSW1>2
2<LSW2>3
2<MSB3:MSB2>4
2<LSW3>5
PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED)
EB0300
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
A8E761
000000
000000
807600
887840
000000
<VISI>
(Hex)
Data
-
MOV
MOV
MOV
MOV
MOV
MOV
CLR
NOP
TBLWTL
NOP
NOP
TBLWTH.B[W6++], [W7++]
NOP
NOP
TBLWTH.B[W6++], [++W7]
NOP
NOP
TBLWTL
NOP
NOP
TBLWTL
NOP
NOP
TBLWTH.B[W6++], [W7++]
NOP
NOP
TBLWTH.B[W6++], [++W7]
NOP
NOP
TBLWTL
NOP
NOP
BSET
NOP
NOP
Externally time ‘P13’ msec (see Section TABLE 8-1: “AC/DC
Characteristics and Timing Requirements”) to allow suffi-
cient time for the Page Erase operation to complete.
MOV
MOV
NOP
Clock out contents of VISI register. Repeat until the WR bit
is clear.
W0, VISI
#<LSW0>, W0
#<MSB1:MSB0>, W1
#<LSW1>, W2
#<LSW2>, W3
#<MSB3:MSB2>, W4
#<LSW3>, W5
NVMCON, W0
W6
[W6++], [W7]
[W6++], [W7++]
[W6++], [W7]
[W6++], [W7++]
NVMCON, #15
Preliminary
Description
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DS70152D-page 69