PIC16C923-04I/CL Microchip Technology, PIC16C923-04I/CL Datasheet - Page 57

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PIC16C923-04I/CL

Manufacturer Part Number
PIC16C923-04I/CL
Description
8-Bit CMOS Microcontroller with LCD Driver
Manufacturer
Microchip Technology
Datasheet
10.0
The CCP (Capture/Compare/PWM) module contains a
16-bit register which can operate as a 16-bit capture
register, as a 16-bit compare register, or as a PWM
master/slave duty cycle register. Table 10-1 shows the
timer resources used by the CCP module.
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All three are readable and writ-
able.
Figure 10-1 shows the CCP1CON register.
FIGURE 10-1: CCP1CON REGISTER (ADDRESS 17h)
1997 Microchip Technology Inc.
bit7
bit 7-6: Unimplemented: Read as '0'
bit 5-4: CCP1X:CCP1Y: PWM Least Significant bits
bit 3-0: CCP1M3:CCP1M0: CCP1 Mode Select bits
U-0
CAPTURE/COMPARE/PWM
(CCP) MODULE
Capture Mode
Unused
Compare Mode
Unused
PWM Mode
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
0000 = Capture/Compare/PWM off (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (bit CCP1IF is set)
1001 = Compare mode, clear output on match (bit CCP1IF is set)
1010 = Compare mode, generate software interrupt on match (bit CCP1IF is set, CCP1 pin is unaffected)
1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1)
11xx = PWM mode
U-0
CCP1X CCP1Y CCP1M3
R/W-0
R/W-0
R/W-0
CCP1M2
R/W-0
CCP1M1 CCP1M0
R/W-0
For use of the CCP module, refer to the Embedded
Control Handbook, "Using the CCP Modules" (AN594).
TABLE 10-1: CCP MODE - TIMER RESOURCE
CCP Mode
Compare
Capture
PWM
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n =Value at POR reset
PIC16C9XX
read as ‘0’
Timer Resource
DS30444E - page 57
Timer1
Timer1
Timer2

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