PIC16C923-04I/CL Microchip Technology, PIC16C923-04I/CL Datasheet - Page 27

• Manufacturer Part Number: PIC16C923-04I/CL
• Description: 8-Bit CMOS Microcontroller with LCD Driver
• Manufacturer: Microchip Technology

4.2.2.5
This register contains the individual flag bits for the
peripheral interrupts.
FIGURE 4-7: PIR1 REGISTER (ADDRESS 0Ch)
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5-4: Unimplemented: Read as '0'
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: Bit ADIF is reserved on the PIC16C923, always maintain this bit clear.
R/W-0
LCDIF
Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the
global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to
enabling an interrupt.
PIR1 REGISTER
LCDIF: LCD Interrupt Flag bit
1 = LCD interrupt occurred (must be cleared in software)
0 = LCD interrupt did not occur
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
SSPIF: Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
ADIF
R/W-0
(1)
U-0
—
U-0
—
SSPIF
R/W-0
(1)
CCP1IF
R/W-0
TMR2IF
R/W-0
Note:
TMR1IF
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
PIC16C9XX
read as ‘0’
DS30444E - page 27