PIC16C923-04I/CL Microchip Technology, PIC16C923-04I/CL Datasheet - Page 19

• Manufacturer Part Number: PIC16C923-04I/CL
• Description: 8-Bit CMOS Microcontroller with LCD Driver
• Manufacturer: Microchip Technology

4.2.2
The Special Function Registers are registers used by
the CPU and Peripheral Modules for controlling the
desired operation of the device. These registers are
implemented as static RAM.
TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note
Address Name
1997 Microchip Technology Inc.
Bank 0
(1)
(1)
1: Registers ADRES, ADCON0, and ADCON1 are not implemented in the PIC16C923, read as '0'.
2: These bits are reserved on the PIC16C923, always maintain these bits clear.
3: These pixels do not display, but can be used as general purpose RAM.
4: PIC16C923 reset values for PORTA: --xx xxxx for a POR, and --uu uuuu for all other resets,
5: Bit1 of ADCON0 is reserved on the PIC16C924, always maintain this bit clear.
SPECIAL FUNCTION REGISTERS
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PORTD
PORTE
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
ADRES
ADCON0
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented read as '0',
shaded locations are unimplemented, read as ‘0’.
PIC16C924 reset values for PORTA: --0x 0000 when read.
—
—
—
—
—
—
—
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
PORTD Data Latch when written: PORTD pins when read
PORTE pins when read
Unimplemented
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
Timer2 module’s register
Capture/Compare/PWM Register (LSB)
Capture/Compare/PWM Register (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
A/D Result Register
PORTB Data Latch when written: PORTB pins when read
Synchronous Serial Port Receive Buffer/Transmit Register
ADCS1
WCOL
LCDIF
Bit 7
IRP
GIE
—
—
—
—
—
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
ADIF
SSPOV
ADCS0
PEIE
Bit 6
RP1
—
—
—
—
—
(2)
PORTA Data Latch when written: PORTA pins when read
PORTC Data Latch when written: PORTC pins when read
T1CKPS1
SSPEN
CCP1X
CHS2
Bit 5
T0IE
RP0
—
—
Write Buffer for the upper 5 bits of the Program Counter
T1CKPS0 T1OSCEN
CCP1Y
CHS1
INTE
Bit 4
CKP
TO
—
CCP1M3
SSPM3
SSPIF
CHS0
RBIE
Bit 3
PD
The special function registers can be classified into two
sets (core and peripheral). Those registers associated
with the “core” functions are described in this section,
and those related to the operation of the peripheral fea-
tures are described in the section of that peripheral fea-
ture.
GO/DONE
TMR2ON
CCP1M2
T1SYNC
CCP1IF
SSPM2
Bit 2
T0IF
Z
T2CKPS1
TMR1CS
CCP1M1
TMR2IF
SSPM1
INTF
Bit 1
DC
(5)
PIC16C9XX
T2CKPS0
TMR1ON
CCP1M0
TMR1IF
SSPM0
ADON
RBIF
Bit 0
C
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
0000 0000 0000 0000
0000 0000 0000 0000
---0 0000 ---0 0000
0000 000x 0000 000u
00-- 0000 00-- 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --uu uuuu
0000 0000 0000 0000
-000 0000 -000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --00 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
DS30444E - page 19
Power-on
Value on
Reset
(4)
—
—
—
—
—
—
—
other resets
Value on all
(4)
—
—
—
—
—
—
—