TSS463-AA ATMEL Corporation, TSS463-AA Datasheet - Page 29

• Manufacturer Part Number: TSS463-AA
• Description: Van (ISO Standard 11519-3) Datalink Controller With Serial Interface.
• Manufacturer: ATMEL Corporation

4205A–AUTO–03/03
Diagnosis Control Register (0x02)
•
•
The diagnosis is discussed in greater detail in the section “Diagnosis System” on page
22.
•
•
•
The input clock is the timeslot clock.
Table 6. System Diagnosis Clock Divider
SDC calculation: (see “SDC Signal (Synchronous Diagnosis Clock)” on page 24).
Notes:
Example: For VAN frame speed rate = 62,5 KTS/s (1 TS = 16 µs), SDC >100 ms
SDC3
Read/Write register
Default value after reset: 0×00.
In its four high order bits, the user can program the SDC rate SDC [3:0]
In its two medium order bits, the diagnosis system mode is controlled: M1, M0.
In the two low order bits, the user controls if the SDC and TIP are to be generated
automatically ETIP, ESDC.
SDC [3:0]: SDC divider
7
1. For each module, determine the largest interframe spacing, LIFS (*).
2. For the whole network, get the maximum LIFS, MAX-LIFS.
3. SDC period > MAX-LIFS.
(*) IFS min. = 4 TS
SDC DIVIDER SDC [3:0]
SDC2
=> 100 ms / 16 µs = 6250, divider chosen: 8192, SDC [3:0] = 0111.
6
0000
0001
0010
0011
0100
0101
0110
1000
1001
1010
1011
1100
1101
0111
1110
1111
SDC1
5
SDC0
4
Ma
3
Mb
2
Divide by
1048576
2097152
131072
262144
524288
TSS463-AA
16384
32768
65536
1024
2048
4096
8192
128
256
512
64
ETIP
1
ESDC
0
29