ADC1175-50CIMT National Semiconductor, ADC1175-50CIMT Datasheet - Page 7

• Manufacturer Part Number: ADC1175-50CIMT
• Description: 8-Bit/ 50 MSPS/ 125 mW A/D Converter
• Manufacturer: National Semiconductor

DIGITAL OUTPUT CHARACTERISTICS
I
AC ELECTRICAL CHARACTERISTICS
f
f
t
t
t
t
t
OZH
C1
C2
OD
DS
AJ
OH
EN
Symbol
The following specifications apply for AV
50 MHz at 50% duty cycle. Boldface limits apply for T
Converter Electrical Characteristics
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test condi-
tions.
Note 2: All voltages are measured with respect to GND = AV
Note 3: When the input voltage at any pin exceeds the power supplies (that is, less than AV
be limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of
25 mA to two.
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (
TSSOP,
this part is 98˚C/W for the EIAJ SOIC.) Note that the power dissipation of this device under normal operation will typically be about 258 mW (210 mW quiescent power
+38 mW reference ladder power +10 mW due to 1 TTL load on each digital output. The values for maximum power dissipation listed above will be reached only when
the ADC1175-50 is operated in a severe fault condition (e.g., when input or output pins are driven beyond the power supply voltages, or the power supply polarity
is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
Note 6: See AN-450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 7: The analog inputs are protected as shown below. Input voltage magnitudes up to 6.5V or 500 mV below GND will not damage this device. However, errors
in the A/D conversion can occur if the input goes above V
be 4.80 V
Note 8: To guarantee accuracy, it is required that AV
Note 9: Typical figures are at T
Level).
, I
OZL
JA
DC
is 92˚C/W, so P
TRI-STATE
Maximum Conversion Rate
Minimum Conversion Rate
Output Delay
Pipeline Delay (Latency)
Sampline (Aperture) Delay
Aperture Jitter
Output Hold Time
PD Low to Data Valid
to ensure accurate conversions.
Parameter
D
®
max = 1,358 mW at 25˚C and 815 mW at the maximum operating ambient temperature of 75˚C. (Typical thermal resistance,
Output Current
J
= 25˚C, and represent most likely parametric norms. Test limits are guaranteed to National’s AOQL (Average Outgoing Quality
JA
) and the ambient temperature (T
DD
DD
= DV
DD
and DV
DV
V
CLK high to data valid
CLK low to acquisition of data
CLK high to data invalid
Loaded as in Figure 2
J
OL
max) for this device is 150˚C. The maximum allowable power dissipation is dictated by T
or below GND by more than 50 mV. As an example, if AV
DD
DD
SS
= DV
DD
= DV
= 5.25V, PD = DV
= +5.0 V
be well bypassed. Each V
DD
SS
A
, or V
= T
= 0V, unless otherwise specified.
Conditions
A
DC
), and can be calculated using the formula P
(Continued)
MIN
resistor. Machine model is 220 pF discharged through 0 .
OL
7
, PD = 0V, V
to T
= 0V
MAX
DD
SS
,
or DV
; all other limits T
DD
RT
pin must be decoupled with separate bypass capacitors.
SS
, or greater than AV
= +2.6V, V
DS100896-10
(Note 9)
Typical
±
DD
RB
140
A
2.5
55
14
10
10
1
3
20
= 25˚C (Notes 7, 8).
is 4.75 V
= 0.6V, C
DD
D
or DV
max = (T
DC
DD
(Note 9)
, the full-scale input voltage must
Limits
), the current at that pin should
L
50
20
J
5
= 20 pF, f
max–T
A
)/
JA
Clock Cycles
CLK
www.national.com
. In the 24-pin
MHz (min)
ns (max)
ns (min)
(Limits)
ps rms
J
Units
MHz
=
max, the
µA
ns
ns
ns
JA
, of