MD3331-D64-V3 M-Systems Inc., MD3331-D64-V3 Datasheet - Page 49

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MD3331-D64-V3

Manufacturer Part Number
MD3331-D64-V3
Description
Diskonchip Millennium Plus
Manufacturer
M-Systems Inc.
Datasheet

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3. Control is returned to the OS to continue other tasks. When the IRQ# interrupt is received, other interrupts are
4. The OS either returns control immediately to the TrueFFS driver, or waits for the appropriate condition to return
For further information on implementing the interrupt mechanism, please refer to application note AP-DOC-063,
Improving the Performance of DiskOnChip Plus Devices Using the IRQ# Pin.
9.5
The following section describes hardware design issues.
9.5.1 Wait State
Wait states can be implemented only when DiskOnChip Millennium Plus is designed in a bus that supports a Wait
state insertion, and supplies a WAIT signal.
9.5.2 Big and Little Endian Systems
PowerPC, ARM, and other RISC processors can use either Big or Little Endian systems. DiskOnChip uses the Little
Endian system. Therefore, bytes D[7:0] are its Least Significant Byte (LSB) and bytes D[15:8] are its Most
Significant Byte (MSB). Within the bytes, bit D0 and bit D8 are the least significant bits of their respective byte.
When connecting the DiskOnChip to a device that supports the Big Endian system, make sure to that the bytes of the
CPU and DiskOnChip match.
Note: Processors, such as the PowerPC, also change the bit ordering within the bytes. Failing to follow these rules
For further information on how to connect DiskOnChip Millennium Plus to support CPUs that use the Big Endian
system, refer to the application note for the relevant CPU.
9.5.3 Busy Signal
The Busy signal (BUSY#) indicates that DiskOnChip Millennium Plus has not yet completed internal initialization.
After reset, BUSY# is asserted while the IPL is downloaded into the internal boot block and the Data Protection
Structures (DPS) are downloaded to the Protection State Machines. Once the download process is completed,
BUSY# is negated. It can be used to delay the first access to DiskOnChip Millennium Plus until it is ready to accept
valid cycles.
Note: The TrueFFS driver does NOT use this signal to indicate that the flash is in busy state (e.g. program, read, or
9.5.4 Working with 8/16/32-Bit Systems with a Standard Interface
When using a standard interface, DiskOnChip Millennium Plus can be configured for either 8-bit, 16-bit or 32-bit
bus operations.
8-Bit (Byte) Data Access Mode
When configured for 8-bit operation, IF_CFG should be negated. Data should then be driven only on the low data
bus signals D[7:0]. D[15:8] and BHE# are internally pulled up and may be left floating.
16-Bit (Word) Data Access Mode
When configured for 16-bit operation, IF_CFG should be asserted. The following definition is compatible with
16-bit platforms using the BHE#/BLE# protocol:
49
disabled and the OS is flagged.
control to the TrueFFS driver.
Platform-Specific Issues
results in improper connection of DiskOnChip and prevents the TrueFFS driver from identifying
DiskOnChip.
erase).
When the host BLE# signal asserts DiskOnChip Millennium Plus A0, data is valid on D[7:0].
Data Sheet, Rev. 1.7
DiskOnChip Millennium Plus 16/32/64MByte
93-SR-002-03-8L

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