MT8931C Zarlink Semiconductor, MT8931C Datasheet - Page 5

• Manufacturer Part Number: MT8931C
• Description: 4 Wire Full-duplex 2B+D (192 Kbps) Data Format Isdn S And T Subscriber Network Interface Circuit
• Manufacturer: Zarlink Semiconductor

Data Sheet
Figure 4 - ST-BUS Channel Assignment
The B1 and B2 channels each have a bandwidth of
64 kbit/s and are used to carry PCM voice or data
across the network.
The D-channel is primarily intended to carry
signalling information for circuit switching through
the ISDN network. The SNIC provides the capability
of having a 16 kbit/s or full 64 kbit/s D-channel by
allocating the B1-channel timeslot to the D-channel.
Access to the depacketized D-channel is only
granted through the parallel microprocessor port.
The C-channel provides a means for the system to
control and monitor the functionality of the SNIC.
This control/status channel is accessed by the
system through the ST-BUS or microprocessor port.
The C-channel provides access to two registers
which provide complete control over the state
activation
mechanism as well as the various maintenance
functions. A detailed description of these registers is
discussed in the microprocessor port interface.
Line Code
The line code used on the S-interface is a Pseudo
ternary code with 100% pulse width as seen in
Figure 5 below.
marks on the line and successive marks will
alternate in polarity.
A mark which does not adhere to the alternating
polarity is known as a bipolar violation.
Figure 5 - Alternate Zero Inversion Line Code
BINARY
LINE
SIGNAL
VALUE
0
machine,
1
Binary zeros are represented as
0
0
the
0
1
D-channel
0
Violation
0
1
1
priority
5