MT9041 Zarlink Semiconductor, MT9041 Datasheet - Page 9

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MT9041

Manufacturer Part Number
MT9041
Description
Single Reference Frequency Selectable Digital PLL With Multiple Clock Outputs For T1/E1 Trunk And Backplane Synchronization
Manufacturer
Zarlink Semiconductor
Datasheet

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In Freerun Mode, the frequency tolerance at the clock outputs is identical to the frequency tolerance of the source
at the OSCi pin. For applications not requiring an accurate Freerun Mode, tolerance of the master timing source
may be ±100ppm. For applications requiring an accurate Freerun Mode, such as Bellcore GR-1244-CORE, the
tolerance of the master timing source must be no greater than ±32ppm.
Another consideration in determining the accuracy of the master timing source is the desired capture range. The
sum of the accuracy of the master timing source and the capture range of the MT9041B will always equal
±230ppm. For example, if the master timing source is ±100ppm, then the capture range will be ±130ppm.
Clock Oscillator - when selecting a Clock Oscillator, numerous parameters must be considered. These include
absolute frequency, frequency change over temperature, output rise and fall times, output levels and duty cycle.
See AC Electrical Characteristics.
For applications requiring ±32ppm clock accuracy, the following clock oscillator module may be used.
CTS CXO-65-HG-5-C-20.0MHz
Frequency:
Tolerance:
Rise & Fall Time:
Duty Cycle:
The output clock should be connected directly (not AC coupled) to the OSCi input of the MT9041B, and the OSCo
output should be left open as shown in Figure 5.
20MHz
25ppm 0C to 70C
8ns (0.5V 4.5V 50pF)
45% to 55%
MT9041B
Figure 5 - Clock Oscillator Circuit
Zarlink Semiconductor Inc.
OSCo
OSCi
No Connection
MT9041B
9
20MHz OUT
GND
+5V
+5V
0.1uF
Data Sheet

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