HY29LV160 Hynix Semiconductor, HY29LV160 Datasheet - Page 21

• Manufacturer Part Number: HY29LV160
• Description: 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory
• Manufacturer: Hynix Semiconductor

When the system detects that DQ[7] has changed
from the complement to true data (or “0” to “1” for
erase), it should do an additional read cycle to read
valid data from DQ[7:0]. This is because DQ[7]
may change asynchronously with respect to the
other data bits while Output Enable (OE#) is as-
serted low.
Figure 7 illustrates the Data# Polling test algorithm.
DQ[6] - Toggle Bit I
Toggle Bit I on DQ[6] indicates whether an Auto-
matic Program or Erase algorithm is in progress
or complete, or whether the device has entered
the Erase Suspend mode. Toggle Bit I may be
read at any address, and is valid after the rising
edge of the final WE# pulse in the Program or
Erase command sequence, including during the
sector erase time-out. The system may use ei-
ther OE# or CE# to control the read cycles.
Successive read cycles at any address during an
Automatic Program algorithm operation (including
programming while in Erase Suspend mode)
cause DQ[6] to toggle. DQ[6] stops toggling when
the operation is complete. If a program address
falls within a protected sector, DQ[6] toggles for
approximately 1 µs after the program command
sequence is written, then returns to reading array
data.
Table 11. Write and Erase Operation Status Summary
Notes:
1. A valid address is required when reading status information. See text for additional information.
2. DQ[5] status switches to a ‘1’ when a program or erase operation exceeds the maximum timing limit.
3. A ‘1’ during sector erase indicates that the 50 µs time-out has expired and active erasure is in progress. DQ[3] is not
4. Equivalent to ‘No Toggle’ because data is obtained in this state.
5. Data (DQ[7:0]) = 0xFF immediately after erasure.
6. Programming can be done only in a non-suspended sector (a sector not specified for erasure).
Rev. 1.2/May 01
S
N
applicable to the chip erase operation.
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Notes:
1. During programming , the program address. During sector erase , an
2. Recheck DQ[7] since it may change asynchronously to DQ[5].
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address within any non-protected sector specified for erasure. During
chip erase , an address within any non-protected sector.
[
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Figure 7. Data# Polling Test Algorithm
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N O
EXCEEDED TIME ERROR
at Valid Address (Note 1)
at Valid Address (Note 1)
D
PROGRAM/ERASE
D
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0
0
0
Q
1 /
1 /
1 /
DQ[7] = Data?
DQ[7] = Data?
a
a
a
a
Read DQ[7:0]
Read DQ[7:0]
0
DQ[5] = 1?
[
a t
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] 5
(Note 2)
2
2
2
START
YES
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A /
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YES
Test for DQ[7] = 1?
for Erase Operation
YES
Test for DQ[7] = 1?
for Erase Operation
D
T
T
D
PROGRAM/ERASE
D
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D
Q
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N
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HY29LV160
4
1
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#
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