LPC2925 NXP Semiconductors, LPC2925 Datasheet - Page 49

• Manufacturer Part Number: LPC2925
• Description: (LPC2921 - LPC2925) ARM9 microcontroller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2921_2923_2925_0
Preliminary data sheet
www.DataSheet4U.com
6.15.5.1 Functional description
Using the base clocks from the CGU as input, the PMU generates branch clocks to the
rest of the LPC2921/2923/2925. Output clocks branched from the same base clock are
phase- and frequency-related. These branch clocks can be individually controlled by
software programming.
The key features are:
The PMU controls all internal clocks coming out of the CGU0 for power-mode
management. With some exceptions, each branch clock can be switched on or off
individually under control of software register bits located in its individual configuration
register. Some branch clocks controlling vital parts of the device operate in a fixed mode.
Table 29
By programming the configuration register the user can control which clocks are switched
on or off, and which clocks are switched off when entering Power-down mode.
Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting
the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU
into power-down should be controlled by disabling the branch clock for the CPU.
Remark: For any disabled branch clocks to be re-activated their corresponding base
clocks must be running (controlled by the CGU0).
Table 29
Every branch clock is related to one particular base clock: it is not possible to switch the
source of a branch clock in the PMU.
Table 29.
Legend:
‘1’ Indicates that the related register bit is tied off to logic HIGH, all writes are ignored
‘0’ Indicates that the related register bit is tied off to logic LOW, all writes are ignored
‘+’ Indicates that the related register bit is readable and writable
Branch clock name
CLK_SAFE
CLK_SYS_CPU
CLK_SYS
CLK_SYS_PCR
CLK_SYS_FMC
•
•
•
•
•
•
•
Individual clock control for all LPC2921/2923/2925 sub-modules
Activates sleeping clocks when a wake-up event is detected
Clocks can be individually disabled by software
Supports AHB master-disable protocol when AUTO mode is set
Disables wake-up of enabled clocks when Power-down mode is set
Activates wake-up of enabled clocks when a wake-up event is received
Status register is available to indicate if an input base clock can be safely switched off
(i.e. all branch clocks are disabled)
shows which mode- control bits are supported by each branch clock.
shows the relation between branch and base clocks, see also
Branch clock overview
Rev. 00.01 — 24 October 2008
Base clock
BASE_SAFE_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
BASE_SYS_CLK
ARM9 microcontroller with CAN and LIN
LPC2921/2923/2925
Implemented switch on/off
mechanism
WAKE-UP
0
+
+
+
+
AUTO
0
+
+
+
+
© NXP B.V. 2008. All rights reserved.
Section
RUN
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6.7.1.
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