ADAV400 Analog Devices, ADAV400 Datasheet - Page 28

• Manufacturer Part Number: ADAV400
• Description: Audio Codec
• Manufacturer: Analog Devices

ADAV400
CONTROL REGISTERS
Table 28. Audio Register Map
Register Address (Hex)
0x1052
0x1053
0x1054
0x1055
0x1056
0x1057
0x1058
0x1059
0x105A
0x110D
0x1113
Table 29. Audio Core Control Register
Register Address 0x1052
Register Bits
15
14
13
12
11
10
9
8
7
1
Clears internal processor registers (active low)
Function
Reserved (set to 0)
Enable SDO2 and SDO3
Indicates when slew RAM is muted (read only)
Equivalent to writing 0s to the target RAM
Reserved (set to 0)
Reserved (set to 0)
Forces multiplier input to 0
Initializes data RAM to zero
0 = enabled
0 = registers cleared
1 = disabled
0 = normal operation
1 = RAM zeroed
1 = normal operation
0 = normal operation
1 = forced to 0
0 = normal operation
1 = enabled
Default Readback = 0x4000
Register Name
Audio core control register (see Table 29)
RAM modulo control register (see Table 30)
Serial output control register (see Table 31)
Serial input control register (see Table 32)
SRC serial port control register (see Table 33)
ADC input mux control register (see Table 34)
Power control register (see Table 35)
User Control Register 1 (see Table 37)
User Control Register 2 (see Table 36)
DAC amplifier register (see Table 38)
Headphone amplifier register (see Table 39)
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Register Bits
6
5
4
3:2
1:0
1
The polarity of this bit is inverted when read.
Function
Mutes serial input ports
Initiates safeload-to-target/slew RAM
Initiates safeload-to-parameter RAM
Reserved (set to 0)
Programs length
0 = normal operation
1 = muted
0 = off
1 = on
0 = off
1 = on
00 = 2560 (48 kHz)
01 = 1280 (96 kHz digital IO only)
10 = 640 (192 kHz digital IO only)
11 = reserved
Register Width (Bits)
16
8
16
8
8
16
16
16
16
16
16