STK672-432A-E Sanyo Semicon Device, STK672-432A-E Datasheet - Page 6

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STK672-432A-E

Manufacturer Part Number
STK672-432A-E
Description
2-phase Stepping Motor Driver
Manufacturer
Sanyo Semicon Device
Datasheet
www.DataSheet.co.kr
Precautions
[GND wiring]
• To reduce noise on the 5V/24V system, be sure to place the GND of C01 in the circuit given above as close as
[Input pins]
• When V DD is being input, for each input pin, measures must be taken so that a negative voltage less than -0.3V is not
• High voltage input other than V DD , MOI, FAULT1, and FAULT2 is 2.5V.
• Pull-up resistors are not connected to input pins. Pull-down resistors are attached. When controlling the input to the
• When using the power on reset function built into the hybrid IC, be sure to directly connect Pin 14 to V DD .
• We recommend attaching a 1,000pF capacitor to each input to prevent malfunction during high-impedance input. Be
[Current setting Vref]
• We recommend a resistance of 1kΩ or less for RO2 to reduce the effect of input bias current to the Vref pin.
• If the motor current is temporarily reduced, the circuit given below is recommended.
[Setting the motor current]
The motor current, I OH , is set using the Pin 19 voltage, Vref, of the hybrid IC. Equations related to I OH and Vref are
given below.
The value of 4.9 in Equation (2) above represents the Vref voltage as divided by a circuit inside the control IC.
Rs: 0.152Ω (Current detection resistor inside the hybrid IC)
In addition, in order to set the current accurately, the GND side of RO2 of Vref must be connected to the shared
ground terminal used by the Pin 18 (S.G) GND, P.G1 and P.G2.
The variable voltage range of Vref input is 0.14 to 1.48V.
possible to Pin 2 and Pin 6 of the hybrid IC.
applied to Pin 18. Measures must also be taken so that a voltage equal to or greater than V DD is not input.
hybrid IC with the open collector type, be sure to connect a pull-up resistor (1 to 20kΩ).
Be sure to use a device (0.8V or less, low level, when I OL =5mA) for the open collector driver at this time that has an
output voltage specification such that voltage is pulled to less than 0.8V at low level.
sure to connect the capacitor near the hybrid IC, between Pin 18 (S, G).
When input is fixed low, directly connect to Pin 18. When input is fixed high, directly connect to V DD .
Vref ≈ (RO2 ÷ (RO2+RO1))×V DD (5V) ························································· (1)
I OH ≈ (Vref ÷ 4.9) ÷ Rs ·················································································· (2)
R3
RO2
5V
RO1
Vref
STK672-432A-E
R3
RO2
5V
RO1
Vref
No.A1586-6/21
Datasheet pdf - http://www.DataSheet4U.net/

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