ADS7864YB Burr-Brown Corporation, ADS7864YB Datasheet - Page 13

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ADS7864YB

Manufacturer Part Number
ADS7864YB
Description
500kHz/ 12-Bit/ 6-Channel Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER
Manufacturer
Burr-Brown Corporation
Datasheet

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With (A2 A1 A0) = 110 the interface is running in a cycle
mode (see Figures 11 and 12). Here, data from channel A0
is read on the first RD signal, then A1 on the second,
followed by B0, B1, C0 and finally C1 before reading A0
again. Data from channel A0 is brought to the output first
after a reset-signal or after powering the part up.
The third mode is a FIFO mode that is addressed with (A2
A1 A0 = 111). Data of the channel that is converted first will
be read first. So, if a particular channel is most interesting
FIGURE 11. Reading Data in Cycling Mode.
FIGURE 12. Reading Data in Cycling Mode.
BYTE
RD
CS
HOLDA
HOLDC
BUSY
BYTE
CS
RD
LOW
A0
HIGH
A0
LOW
A1
HIGH
A1
LOW
13
B0
and is converted more frequently (e.g., to get a history of a
particular channel) then there are 3 output registers per
channel available to store data.
If a read process is just going on (RD signal low) and new
data has to be stored, then the ADS7864 will wait until the
read process is finished (RD signal going high) before the
new data gets latched into its output register.
HIGH
B0
B1
C0
C1
ADS7864
A0
®

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