CLIENT ST Microelectronics, Inc., CLIENT Datasheet - Page 31

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CLIENT

Manufacturer Part Number
CLIENT
Description
STPC Client Datasheet / PC Compatible Embeded Microprocessor
Manufacturer
ST Microelectronics, Inc.
Datasheet
Note that the SIMM speed and type information
read here is meant only for the software and is not
used by the hardware. The software must pro-
gram the Host and graphics dram controller con-
figuration registers appropriately based on these
bits.
This register defaults to the values sampled on
MD[15:8] pins after reset.
3.1.3 Strap register 2 Index 4Ch (Strap2)
Bits 4-0; This register reflect the status of pins
MD[20:16] respectively.They are use by the chip
as follows:
Bit 4-2; Reserved.
Bit Sampled
Bits 6-5
Bits 3-2
Bit 7
Bit 4
Bit 1
Bit 0
SIMM 2 DRAM type
SIMM 3 dram type
SIMM 2 speed
SIMM 3 speed
Description
Reserved
Reserved
Issue 2.2 - October 13, 2000
Bit 1; This bit reflects the value sampled on
MD[17] pin and controls the PCI clock output as
follows:
Bit 0; Reserved.
This register defaults to the values sampled on
MD[20:16] pins after reset.
3.1.4 HCLK PLL Strap register Index 5Fh
(HCLK_Strap)
Bits 5-0 of this register reflect the status of the
MD[26:21] & are used as follows:
Bit 5-3 These pins reflect the value sampled on
MD[26:24] pins respectively and control the Host
clock frequency synthesizer
Bit 2- 0 Reserved
This register defaults to the values sampled on
above pins after reset.
These pin must not be pulled low for normal sys-
tem operation.
0: PCI clock output = HCLK / 2
1: PCI clock output = HCLK / 3.
STRAP OPTION
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