MAX9879 Maxim Integrated Products, MAX9879 Datasheet - Page 28

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MAX9879

Manufacturer Part Number
MAX9879
Description
Stereo Class D Audio Subsystem
Manufacturer
Maxim Integrated Products
Datasheet
www.datasheet4u.com
actual speaker lead length. Select a capacitor less than
1nF based on EMI performance.
An input capacitor, C
impedance of the MAX9879 forms a highpass filter that
removes the DC bias from an incoming signal. The AC-
coupling capacitor allows the amplifier to automatically
bias the signal to an optimum DC level. Assuming zero
source impedance, the -3dB point of the highpass filter
is given by:
Choose C
quency of interest. Use capacitors whose dielectrics
have low-voltage coefficients, such as tantalum or alu-
minum electrolytic. Capacitors with high-voltage coeffi-
cients, such as ceramics, may result in increased
distortion at low frequencies.
BIAS is the output of the internally generated DC bias volt-
age. The BIAS bypass capacitor, C
supply and other noise sources at the common-mode
bias node. Bypass BIAS with a 1µF capacitor to GND.
Use capacitors with an ESR less than 100mΩ for optimum
performance. Low-ESR ceramic capacitors minimize the
output resistance of the charge pump. Most surface-
mount ceramic capacitors satisfy the ESR requirement.
For best performance over the extended temperature
range, select capacitors with an X7R dielectric.
The value of the flying capacitor (C1) affects the output
resistance of the charge pump. A C1 value that is too
small degrades the device’s ability to provide sufficient
current drive, which leads to a loss of output voltage.
Increasing the value of C1 reduces the charge-pump out-
put resistance to an extent. Above 1µF, the on-resistance
of the switches and the ESR of C1 and C2 dominate.
The output capacitor value and ESR directly affect the
ripple at V
ripple. Likewise, decreasing the ESR of C2 reduces both
ripple and output resistance. Lower capacitance values
can be used in systems with low maximum output power
levels. See the Output Power vs. Load Resistance graph
in the Typical Operating Characteristics .
Stereo Class D Audio Subsystem
with DirectDrive Headphone Amplifier
28
______________________________________________________________________________________
IN
SS
. Increasing the value of C2 reduces output
so that f
f
Charge-Pump Capacitor Selection
3
-3dB
dB
IN
Output Holding Capacitor (C2)
, in conjunction with the input
=
is well below the lowest fre-
R C
IN IN
1
Flying Capacitor (C1)
BIAS
Input Capacitor
BIAS Capacitor
, reduces power
In addition to the recommended PVDD bypass capaci-
tance, bulk capacitance equal to C3 should be used.
Place the bulk capacitor as close as possible to the device.
Proper layout and grounding are essential for optimum
performance. Use wide traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Wide traces also aid in mov-
ing heat away from the package. Proper grounding
improves audio performance, minimizes crosstalk
between channels, and prevents any switching noise
from coupling into the audio signal. Connect PGND and
GND together at a single point on the PCB. Route all
traces that carry switching transients away from GND
and the traces/components in the audio signal path.
Connect the PVDD_ pins to a 2.7V to 5.5V source.
Bypass PVDD_ to PGND pin with a 1µF ceramic capac-
itor. Additional bulk capacitance should be used to pre-
vent power supply pumping. Bypass PVDD_ to the
PGND pin with a 1µF ceramic capacitor. Additional
bulk capacitance should be used to prevent power-
supply pumping. Place the bypass capacitors as close
as possible to the MAX9879.
Connect V
1µF capacitor. Place the bypass capacitors as close as
possible to the MAX9879.
Figure 14. MAX9879 Susceptibility to a GSM Cell Phone Radio
-110
-130
-150
-10
-30
-50
-70
-90
DD
10
to PVDD_. Bypass V
100
RF SUSCEPTIBILITY
FREQUENCY (Hz)
THRESHOLD OF HEARING
Layout, and Grounding
PVDD Bulk Capacitor (C3)
1k
NOISE FLOOR
Supply Bypassing,
10k
DD
MAX9879
to GND with a
100k

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