MAX9879 Maxim Integrated Products, MAX9879 Datasheet - Page 25

• Manufacturer Part Number: MAX9879
• Description: Stereo Class D Audio Subsystem
• Manufacturer: Maxim Integrated Products

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A START (S) condition from the master signals the
beginning of a transmission to the MAX9879. The mas-
ter terminates transmission, and frees the bus, by issu-
ing a STOP condition. The bus remains active if a
REPEATED START (Sr) condition is generated instead of
a STOP condition.
The MAX9879 recognizes a STOP (P) condition at any
point during data transmission except if the STOP (P)
condition occurs in the same high pulse as a START (S)
condition. For proper operation, do not send a STOP
(P) condition during the same SCL high pulse as the
START (S) condition.
The MAX9879 is preprogrammed with a slave address
of 1001101R/(W). The address is defined as the seven
most significant bits (MSBs) followed by the Read/Write
bit. Setting the Read/Write bit to 1 configures the
MAX9879 for read mode. Setting the Read/Write bit to 0
configures the MAX9879 for write mode. The address is
the first byte of information sent to the MAX9879 after
the START (S) condition.
Figure 7. START (S), STOP (P), and REPEATED START (Sr) Conditions
Figure 8. Acknowledge
______________________________________________________________________________________
SCL
SDA
with DirectDrive Headphone Amplifier
SDA
SCL
CONDITION
START
Early STOP Conditions
Stereo Class D Audio Subsystem
Slave Address
S
1
2
Sr
NOT ACKNOWLEDGE
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9879 uses to handshake receipt each byte of data
when in write mode (see Figure 8). The MAX9879 pulls
down SDA during the entire master-generated 9th
clock pulse if the previous byte is successfully
received. Monitoring ACK allows for detection of unsuc-
cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault
has occurred. In the event of an unsuccessful data
transfer, the bus master may retry communication.
The master pulls down SDA during the ninth clock
cycle to acknowledge receipt of data when the
MAX9879 is in read mode. An acknowledge is sent by
the master after each read byte to allow data transfer to
continue. A not acknowledge is sent when the master
reads the final byte of data from the MAX9879, followed
by a STOP (P) condition.
A write to the MAX9879 includes transmission of a
START (S) condition, the slave address with the R/W bit
set to 0, one byte of data to configure the internal regis-
ter address pointer, one or more bytes of data, and a
STOP (P) condition. Figure 9 illustrates the proper
frame format for writing one byte of data to the
ACKNOWLEDGE
8
ACKNOWLEDGMENT
CLOCK PULSE FOR
9
P
Write Data Format
Acknowledge
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