MAX793 Maxim, MAX793 Datasheet - Page 14

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MAX793

Manufacturer Part Number
MAX793
Description
3.0V/3.3V Adjustable Microprocessor Supervisory Circuits
Manufacturer
Maxim
Datasheet

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3.0V/3.3V Adjustable Microprocessor
Supervisory Circuits
Figure 12. Using the Power-Fail Comparator to Monitor an Additional Power Supply: (a) V
The power-fail comparator turns off and PFO goes low
when V
first half of the reset timeout period (t
high, irrespective of V
ond half of t
and PFO follows PFI. If the comparator is unused, con-
nect PFI to V
be connected to MR so that a low voltage on PFI will
generate a reset (Figure 12b). In this configuration,
when the monitored voltage causes PFI to fall below
V
ed. Reset remains asserted as long as PFO holds MR
low, and for 200ms after PFO pulls MR high when the
monitored supply is above the programmed threshold.
In the event of a brownout or power failure, it may be
necessary to preserve the contents of RAM. With a
backup battery installed at BATT, the devices automati-
cally switch RAM to backup power when V
order to allow the backup battery (e.g., a 3.6V lithium
cell) to have a higher voltage than V
supervisors (designed for 3.3V and 3V systems) does
not always connect BATT to OUT when V
greater than V
140Ω switch) either when V
14
PFT
(a)
, PFO pulls MR low, causing a reset to be assert-
______________________________________________________________________________________
PFO
V
V
CC
TRIP
CC
V
L
= R2
= R2
falls below V
R1
R2
CC
RP
V
(V
(V
IN
CC
PFT
PFT
, the power-fail comparator is enabled
and leave PFO unconnected. PFO may
+ V
)
. BATT connects to OUT (through a
(
PFH
1
R1
Backup-Battery Switchover
+
)
PFI
(
R2
1
SW
1
R1
. At the beginning of the sec-
)
+
PFI
on power-down. During the
R2
1
V
R1
V
CC
L
)
CC
MAX793
MAX794
V
CC
R1
V
V
GND
falls below V
TRIP
CC
CC
3.0V OR 3.3V
RP
, this family of µP
WHERE
NOTE: V
), PFO is forced
PFO
0V
TRIP,
CC
V
V
PFT
PFH
V
= 1.237V
falls. In
= 10mV
L
BATT
SW
ARE NEGATIVE
V
IN
and
is
V
1.75V (typ) regardless of the BATT voltage.
Switchover at V
entered before V
mum required to reliably retain data in most CMOS
RAM, (switchover at higher V
decrease backup-battery life). When V
switchover is deferred either until V
V
reset threshold (V
power-up switchover technique prevents V
charging the backup battery through OUT when using
an external transistor driven by BATT ON. OUT con-
nects to V
when V
BATT ON is high when OUT is connected to BATT.
Although BATT ON can be used as a logic output to
indicate the battery switchover status, it is most often
used as a gate or base drive for an external pass tran-
sistor for high-current applications (see Driving an
External Switch with BATT ON in the Applications
Information section). When V
power-up, BATT ON sinks 3.2mA at 0.4V. In battery-
backup mode, this terminal sources 100µA from BATT.
(b)
BATT
BATT
PFO
V
is greater than V
CC
is below V
CC
V
V
H
TRIP
= (V
CC
crosses the reset threshold (Figure 13).
R1
R2
=
PFT
V
V
PFT
IN
through a 4Ω (max) PMOS power switch
+ V
SW
(
PFH
R1
OUT
IN
R2
RST
ensures that battery-backup mode is
RST
+ R2
)
BATT ON (MAX793/MAX794)
Is Negative, (b) V
(
R1
)
, or when V
R2
gets too close to the 2.0V mini-
) if V
+ R2
V
CC
PFI
TRIP
)
, or when V
BATT
V
MAX793
MAX794
H
V
GND
CC
CC
is above V
CC
CC
IN
CC
3.0V OR 3.3V
exceeds V
Is Positive
voltages would
rises above the
crosses V
CC
PFO
MR
CC
falls below
RST
recovers,
CC
RST
. This
BATT
V
IN
from
on
if

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