MAX5122 Maxim, MAX5122 Datasheet - Page 13

• Manufacturer Part Number: MAX5122
• Description: +5V/+3V / 12-Bit / Serial / Force/Sense DACs with 10ppm/C Internal Reference
• Manufacturer: Maxim

The 16-bit input word may be sent in two 1-byte pack-
ets (SPI-, MICROWIRE-, and PIC16/PIC17-compatible),
with CS low during this period. The control bits C2, C1,
and C0 (table 1) determine:
The general timing diagram in Figure 6 illustrates how
data is acquired. CS must be low for the part to receive
data. With CS low, data at DIN is clocked into the regis-
ter on the rising edge of SCLK. When CS transitions
high, data is latched into the input and/or DAC regis-
ters, depending on the setting of the three control bits
C2, C1, and C0. The maximum serial clock frequency
guaranteed for proper operation is 10MHz for the
Table 2. Serial Data Format
Figure 6. Serial-Interface Timing
Figure 7. Detailed Serial-Interface Timing
MSB ............................................................................... LSB
The clock edge on which DOUT transitions,
The state of the user-programmable logic output,
The configuration of the device after shutdown.
Control Bits
C2, C1, C0
DOUT
SCLK
DIN
CS
SCLK
+5V/+3V, 12-Bit, Serial, Force/Sense DACs
DIN
CS
16 BITS OF SERIAL DATA
______________________________________________________________________________________
MSB ..... Data Bits ..... LSB
D11................................D0
t
CS0
C2
1
C1
C0 D11 D10
with 10ppm/°C Internal Reference
t
CSS
t
DS
D9
Sub-Bit
D8
S0
D7
t
8
DO1
t
CH
D6
9
MAX5122 and 6.6MHz for the MAX5123. Figure 7
depicts a more detailed timing diagram of the serial
interface.
The MAX5122/MAX5123 are compatible with a
PIC16/PIC17 microcontroller (µC), using the synchro-
nous serial port (SSP) module. To establish SPI commu-
nication, connect the controller as shown in Figure 4
and configure the PIC16/PIC17 as system master by ini-
tializing its synchronous serial port control register (SSP-
CON) and synchronous serial port status register
(SSPSTAT) to the bit patterns shown in Tables 3 and 4.
In SPI mode, the PIC16/PIC17 µCs allow eight bits of
data to be synchronously transmitted and received
simultaneously. Two consecutive 8-bit writings (Figure
6) are necessary to feed the DAC with three control bits,
12 data bits, and one sub-bit. DIN data transitions on
the serial clock’s falling edge and is clocked into the
DAC on SCLK’s rising edge. The first eight bits of DIN
contain the three control bits (C2, C1, C0) and the first
five data bits (D11–D7). The second 8-bit data stream
contains the remaining bits (D6–D0), and the sub-bit S0.
t
CSH
D5
t
CP
D4
t
DO2
D3
t
CL
D2
D1
D0
t
CS1
S0
t
PIC16 with SSP Module
DH
16
t
and PIC17 Interface
CSW
COMMAND
EXECUTED
13