MAX5122 Maxim, MAX5122 Datasheet - Page 12

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MAX5122

Manufacturer Part Number
MAX5122
Description
+5V/+3V / 12-Bit / Serial / Force/Sense DACs with 10ppm/C Internal Reference
Manufacturer
Maxim
Datasheet

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+5V/+3V, 12-Bit, Serial, Force/Sense DACs
with 10ppm/°C Internal Reference
Table 1. Serial-Interface Programming Commands
X = Don’t care
The power-down lockout pin (PDL) disables shutdown
when low. When in shutdown mode, a high-to-low tran-
sition on PDL will wake up the DAC with its output still
set to the state prior to power-down. PDL can also be
used to wake up the device asynchronously.
Pulling PD high places the MAX5122/MAX5123 in shut-
down. Pulling PD low will not return the MAX5122/
MAX5123 to normal operation. A high-to-low transition
on PDL or appropriate commands (Table 1) via the ser-
ial interface are required to exit power-down mode.
The MAX5122/MAX5123 3-wire serial interface is com-
patible with SPI, QSPI, PIC16/PIC17 (Figure 4) and
MICROWIRE (Figure 5) interface standards. The 2-
byte-long serial input word contains three control bits,
12 data bits in MSB-first format, and one sub-bit, which
is always zero (Table 2).
The MAX5122/MAX5123’s digital inputs are double
buffered, which allows the user to:
12
C2
Load the input register without updating the DAC
register,
Update the DAC register with data from the input
register,
Update the input and DAC registers concurrently.
0
0
0
0
1
1
1
1
1
______________________________________________________________________________________
(SPI/QSPI/MICROWIRE/PIC16/PIC17)
C1
0
0
1
1
0
0
1
1
1
16-BIT SERIAL WORD
* S0 is a sub-bit and always zero.
Serial-Interface Configuration
C0
0
1
0
1
1
0
0
1
1
Power-Down Lockout Input
D11 ............... D0
12-Bit DAC Data
12-Bit DAC Data
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
XXXXXXXXXXXX
1XXXXXXXXXXX
00XXXXXXXXXX
Power-Down Input (PD)
(PDL)
S0*
S0*
0
0
0
0
0
0
0
0
0
No operation.
Load input register; DAC register unchanged.
Simultaneously load input and DAC registers; exit shutdown.
Update DAC register from input register; exit shutdown.
Shutdown DAC (provided PDL = 1).
UPO goes low (default).
UPO goes high.
Mode 1; DOUT clocked out on SCLK’s rising edge.
Mode 0; DOUT clocked out on SCLK’s falling edge (default).
Figure 4. SPI/QSPI Interface Connections (PIC16/PIC17)
Figure 5. MICROWIRE Interface Connections
( ) ARE FOR PIC16/PIC17 ONLY.
MAX5122
MAX5123
MAX5122
MAX5123
SCLK
SCLK
DIN
DIN
CS
CS
FUNCTION
CPOL = 0, CPHA = 0
(CKE = 1, CKP = 0, SMP= 0
SSPM3 - SSPM0 = 0001)
SO
I/O
SK
MOSI
SCK
I/O
(PIC16/PIC17)
MICROWIRE
SPI/QSPI
PORT
PORT
V
SS
DD

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