MAX5122 Maxim, MAX5122 Datasheet - Page 11

• Manufacturer Part Number: MAX5122
• Description: +5V/+3V / 12-Bit / Serial / Force/Sense DACs with 10ppm/C Internal Reference
• Manufacturer: Maxim

The circuit in Figure 3 achieves a nominal reference
adjustment range of ±1%. Connect a 33nF capacitor
from REFADJ to AGND to establish low-noise DAC
operation. Larger capacitor values may be used, but
will result in increased start-up delay. The time constant
( for the start-up delay is determined by the REFADJ
input impedance of 4kΩ and C
An external reference may be applied to the REF pin.
Disable the internal reference by pulling REFADJ to
V
DC-based) to be fed into the REF pin. For proper oper-
ation, do not exceed the input voltage range limits of 0
to (V
Determine the output voltage using the following equa-
tion (REFADJ = V
where NB is the numeric value of the MAX5122/
MAX5123 input code (0 to 4095), V
reference voltage, and G is the gain of the output
amplifier, set by an external resistor-divider. The REF
pin has a minimum input resistance of 40kΩ and is
code-dependent.
Figure 3a. MAX5122 Reference Adjust Circuit
DD
. This allows an external reference signal (AC- or
DD
100k
90k
- 1.4V) for V
+5V
V
OUT
+5V/+3V, 12-Bit, Serial, Force/Sense DACs
DD
400k
______________________________________________________________________________________
= V
33nF
REF
= 4kΩ · C
):
REF
.
[(NB / 4096) G]
REFADJ
REFADJ
External Reference
REFADJ
with 10ppm/°C Internal Reference
MAX5122
REF
:
is the external
The MAX5122/MAX5123’s DAC output is internally
buffered by a precision amplifier with a typical slew rate
of 0.6V/µs. Access to the output amplifier’s inverting
input (FB) provides the user greater flexibility with
amplifier gain setting and signal conditioning (see
Applications Information ).
The output amplifier typically settles to ±0.5LSB from a
full-scale transition within 20µs when it is connected in
unity gain and loaded with 5kΩ
than 1kΩ may result in degraded performance.
These devices feature software- and hardware-pro-
grammable (PD pin) shutdown modes that reduce the
typical supply current to 3µA. To enter software shut-
down mode, program the control sequence for the DAC
as shown in Table 1.
In shutdown mode, the amplifier output becomes high-
impedance and the serial interface remains active.
Data in the input registers is saved, allowing the
MAX5122/MAX5123 to recall the output state prior to
entering shutdown when returning to normal operation.
To exit shutdown mode, load both input and DAC regis-
ters simultaneously or update the DAC register from the
input register. When returning from shutdown to normal
operation, wait 2ms for the reference to settle. When
using an external reference, the DAC requires only
20µs for the output to stabilize.
Figure 3b. MAX5123 Reference Adjust Circuit
100k
15k
+3V
400k
33nF
REFADJ
Power-Down Mode
Output Amplifier
MAX5123
100pF. Loads less
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