WM8731 Wolfson Microelectronics Ltd., WM8731 Datasheet - Page 39

• Manufacturer Part Number: WM8731
• Description: WM8731 : Low Power Audio Codec With Integrated Headphone Driver
• Manufacturer: Wolfson Microelectronics Ltd.

WM8731
Table 17 Normal Mode Sample Rate Look-up Table
Notes:
The BOSR bit represents the base over-sampling rate. This is the rate that the WM8731 digital signal
processing is carried out at. In Normal mode, with BOSR = 0, the base over-sampling rate is at
256fs, with BOSR = 1, the base over-sampling rate is at 384fs. This can be used to determine the
actual audio data rate produced by the ADC and required by the DAC.
Example scenarios are:
1.
2.
1.
2.
(Note 1)
(Note 1)
ADC
44.1
44.1
88.2
kHz
48
48
32
96
SAMPLING
8
8
8
8
8k not exact, actual = 8.018kHz
All other combinations of BOSR and SR[3:0] that are not in the truth table are invalid
with a requirement that the ADC data rate is 8kHz and DAC data rate is 48kHz, then choosing
MCLK = 12.288MHz the device is programmed with BOSR = 0 (256fs), SR3 = 0, SR2 = 0, SR1
= 1, SR0 = 0.The ADC output data rate will then be exactly 8kHz (derived from 12.288MHz/256
x1/6) and the DAC expects data at exactly 48kHz (derived from 12.288MHz/256)
with a requirement that ADC data rate is 8kHz and DAC data rate is 44.1kHz, then choosing
MCLK = 16.9344MHz the device is programmed with BOSR = 1 (384fs), SR3 = 1, SR2 = 0, SR1
= 0, SR0 = 1. The ADC will no longer output data at exactly 8.000kHz, instead it will be
8.018kHz (derived from 16.9344MHz/384 x 2/11), the DAC still is at exactly 44.1kHz (derived
from 16.9344MHz/384). A slight (sub 0.5%) pitch shift will therefore result in the 8kHz audio
data and (importantly) the user must ensure that the data across the digital interface is correctly
synchronised at the 8.018kHz rate.
RATE
(Note 1)
(Note 1)
DAC
44.1
88.2
44.1
kHz
48
48
32
96
8
8
8
8
FREQUENCY
11.2896
16.9344
11.2896
16.9344
11.2896
16.9344
11.2896
16.9344
11.2896
16.9344
12.288
18.432
12.288
18.432
12.288
18.432
12.288
18.432
12.288
18.432
12.288
18.432
MCLK
MHz
BOSR
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SR3
REGISTER SETTINGS
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
SAMPLE
RATE
SR2
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
1
1
SR1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
AI Rev 2.3 August 2001
Advanced Information
SR0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
DIGITAL
FILTER
TYPE
1
1
1
1
1
2
1
1
1
1
2
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