MAX17036 Maxim Integrated Products, MAX17036 Datasheet - Page 36

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MAX17036

Manufacturer Part Number
MAX17036
Description
(MAX17030 / MAX17036) 1/2/3-Phase Quick-PWM IMVP-6.5 VID Controllers
Manufacturer
Maxim Integrated Products
Datasheet

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w w w . D a t a S h e e t 4 U . c o m
1/2/3-Phase Quick-PWM
IMVP-6.5 VID Controllers
The optimum high-side MOSFET trades the switching
losses with the conduction (R
input voltage range. Ideally, the losses at V
should be roughly equal to losses at V
lower losses in between. If V
wide range, the minimum power dissipation occurs
where the resistive losses equal the switching losses.
For the low-side MOSFET (N
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than I
but are not quite high enough to exceed the current limit
and cause the fault latch to trip. To protect against this
possibility, the circuit can be overdesigned to tolerate:
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good-size heatsink to handle the overload
power dissipation.
Choose a low-side MOSFET that has the lowest possible
on-resistance (R
package (i.e., one or two thermally enhanced 8-pin SOs),
and is reasonably priced. Make sure that the DL gate dri-
ver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-to-
drain capacitor caused by the high-side MOSFET turning
on; otherwise, cross-conduction problems might occur
(see the MOSFET Gate Drivers section).
The optional Schottky diode (D
ward voltage and be able to handle the load current
per phase during the dead times.
The boost capacitors (C
enough to handle the gate-charging requirements of
the high-side MOSFETs. Select the boost capacitors to
avoid discharging the capacitor more than 200mV while
charging the high-side MOSFETs’ gates:
36
PD (NL Resistive) = 1−
I
LOAD
______________________________________________________________________________________
VALLEY(MAX)
=
=
η
η
TOTAL VALLEY MAX
TOTAL
Low-Side MOSFET Power Dissipation
DS(ON)
C
I
BST
⎝ ⎜
I
VALLEY MAX
is the maximum valley current
V
), comes in a moderate-sized
=
IN MAX
BST
V
N Q
OUT
(
(
×
200
(
) must be selected large
L
IN
), the worst-case power
L
DS(ON)
)
)
GATE
) should have a low for-
mV
+
Boost Capacitors
does not vary over a
)
⎤ ⎤
+
I
LOAD MAX
η
I
LOAD
TOTAL
) losses over the
I
INDUCTOR
IN(MAX)
(
2
2 2
LOAD(MAX)
2
)
LIR
R
IN(MIN)
DS ON
⎠ ⎟
, with
(
)
where N is the number of high-side MOSFETs used for
one regulator, and Q
in the MOSFET’s data sheet. For example, assume (1)
FDS6298 n-channel MOSFETs are used on the high
side. According to the manufacturer’s data sheet, a sin-
gle FDS6298 has a maximum gate charge of 19nC
(V
boost capacitance would be:
Selecting the closest standard value; this example
requires a 0.1µF ceramic capacitor.
TIME and ILIM are used to control the slew rate and
current limit. TIME regulates to a fixed 2.0V. The
MAX17030/MAX17036 use the TIME source current to
set the slew rate (dV
current, the faster the output-voltage slew rate:
where R
TIME and ground.
The ILIM voltage determines the valley current-sense
threshold. When ILIM = V
22.5mV preset current-limit threshold. In an adjustable
design, ILIM is connected to a resistive voltage-
divider connected between TIME and ground. The dif-
ferential voltage between TIME and ILIM sets the cur-
rent-limit threshold (V
threshold:
This allows design flexibility since the DCR sense circuit
or sense resistor does not have to be adjusted to meet
the current limit as long as the current-sense voltage
never exceeds 50mV. Keeping V
40mV leaves room for future current-limit adjustment.
The minimum current-limit threshold must be high
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I
half the ripple current; therefore:
GS
= 5V). Using the above equation, the required
TIME
Current Limit and Slew-Rate Control
dV
TARGET
I
VALLEY
is the sum of resistance values between
C
V
BST
LIMIT
dt
>
TARGET
GATE
LIMIT
=
I
LOAD MAX
=
1 10
=
200
12 5
×
V
), so the valley current-sense
is the gate charge specified
.
TIME
CC
mV
(
/dt). The higher the source
nC
mV µs
, the controller uses the
10
=
)
LIMIT
V
⎝ ⎜
0 05
1
ILIM
.
(TIME and ILIM)
×
⎝ ⎜
LIR
between 20mV to
LOAD(MAX)
µF
71 5
R
2
TIME
. Ω
⎠ ⎟
k
⎠ ⎟
minus

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