MAX15023 Maxim Integrated Products, MAX15023 Datasheet - Page 14

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MAX15023

Manufacturer Part Number
MAX15023
Description
Dual-Output Synchronous Buck Controller
Manufacturer
Maxim Integrated Products
Datasheet

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Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
the error amplifier. The duration of the soft-start ramp is
2048 switching cycles and the resolution is 1/64 of the
steady-state regulation voltage. This allows a smooth
increase of the output voltage. A logic-low on each EN_
initiates a soft-stop sequence by stepping down the ref-
erence voltage of the error amplifier. After the soft-stop
sequence is completed, the MOSFET drivers are both
turned off. See Figure 1 for more detail.
Connect EN1 and EN2 to V
Owing to their accurate turn-on and turn–off thresholds,
EN1 and EN2 can be used as a UVLO adjustment input
and for power sequencing together with the PGOOD_
outputs. (See the Setting the Enable Input (EN_) section).
The adaptive action in the soft-start becomes visible if
the cycle-by-cycle, low-side, source peak current limit
is reached during the soft-start ramping sequence. In
this case, the rate-of-rise of the internal reference is
decreased, so that the PWM controller tries to regulate
to the inductor current around its limit value, rather than
Figure 1. MAX15023 Detailed Power-On/-Off Sequencing
14
DAC_VREF_
______________________________________________________________________________________
V
UVLO
OUT_
DH_
EN_
DL_
V
CC
DAC_VREF_
SYMBOL
V
UVLO
DH_
DL_
EN_
V
OUT_
A
CC
A
Regulator output voltage.
Regulator internal soft-start and soft-stop signal.
V
EN_ is low.
Undervoltage threshold value is provided in
the Electrical Characteristics table.
Internal 5.2V linear regulator output.
Active-high enable input.
Regulator high-side gate-driver output.
Regulator low-side gate-driver output.
B
CC
rising while below the UVLO threshold.
CC
C
for always-on operation.
DEFINITION
D
2048 CLK
CYCLES
E
the output voltage. The soft-start time can be prolonged
up to 4096 clock cycles (twice the normal soft-start
duration). This implementation allows the soft-start time
to be automatically adapted to the time necessary to
keep the LX current below the limit while charging the
output capacitor.
Since soft-start is invoked by the hiccup-mode short-
circuit protection, also see the Hiccup Mode
Overcurrent Protection section for additional details.
The MAX15023 includes two power-good comparators
to monitor the regulators’ output voltages and detect
the power-good threshold, fixed at 92.5% of the nomi-
nal FB voltage. The PGOOD_ outputs are open-drain
and should be pulled up with an external resistor to the
supply voltage of the logic input they drive. This voltage
should not exceed 28V. They can sink up to 2mA of
current while low.
SYMBOL
G
H
F
I
C
D
E
F
B
V
EN is pulled high. DH_ and DL_ start switching.
Normal operation.
V
V
start switching. Normal operation.
EN_ is pulled low. V
EN_ is pulled high. DH_ and DL_ start switching.
Normal operation.
V
Power-Good Outputs (PGOOD_)
CC
CC
CC
CC
drops below UVLO.
is higher than the UVLO threshold. EN_ is low.
goes above UVLO threshold. DH_ and DL_
drops below UVLO.
2048 CLK
CYCLES
G
DEFINITION
OUT_
enters soft-stop.
H
I

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