AD9116-EBZ Analog Devices, AD9116-EBZ Datasheet - Page 9

• Manufacturer Part Number: AD9116-EBZ
• Description: Dual, 8-/10-/12-/14-bit Low Power Digital-to-analog Converters
• Manufacturer: Analog Devices

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 7. AD9117 Pin Function Descriptions
Pin No.
1 to 4
5
6
7
8 to 14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Mnemonic
DB[11:8]
DVDDIO
DVSS
DVDD
DB[7:1]
DB0 (LSB)
DCLKIO
CVDD
CLKIN
CVSS
CMLQ
RLQN
QOUTN
QOUTP
RLQP
AVSS
AVDD
RLIP
IOUTP
IOUTN
RLIN
CMLI
FSADJQ/AUXQ
FSADJI/AUXI
REFIO
RESET/PINMD
Load Resistor (62.5 Ω) to the CMLI Pin.
Description
Digital Inputs.
Digital I/O Supply Voltage (1.8 V to 3.3 V Nominal).
Digital Common.
Digital Core Supply Voltage (1.8 V).
Digital Inputs.
Digital Input (LSB).
Data Input/Output Clock. Clock used to qualify input data.
Sampling Clock Supply Voltage (1.8 V to 3.3 V). CVDD must be ≥ DVDD.
LVCMOS Sampling Clock Input.
Sampling Clock Supply Voltage Common.
Q DAC Output Common-Mode Level.
Load Resistor (62.5 Ω) to the CMLQ Pin.
Complementary Q DAC Current Output. Full-scale current is sourced when all data bits are 0s.
Q DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Load Resistor (62.5 Ω) to the CMLQ Pin.
Analog Common.
Analog Supply Voltage (1.8 V to 3.3 V).
Complementary I DAC Current Output. Full-scale current is sourced when all data bits are 0s.
I DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Load Resistor (62.5 Ω) to the CMLI Pin.
I DAC Output Common-Mode Level.
Full-Scale Current Output Adjust for Q DAC. Connect to AVSS through a resistor.
Auxiliary Q DAC Output When Internal On-Chip, R
Full-Scale Current Output Adjust for I DAC. Connect to AVSS through a resistor.
Auxiliary I DAC Output When Internal On-Chip, R
Reference Input/Output. Serves as a reference input when the internal reference is disabled. Provides a 1.0 V
reference output when in internal reference mode (a 0.1 μF capacitor to AVSS is required).
Reset. In SPI mode, pulse RESET high to reset SPI registers to default values.
Pin Mode. A constant Logic 1 puts the device into pin mode.
DVDDIO
NOTES
1. THE HEAT SINK PAD IS CONNECTED TO AVSS AND
DVDD
MUST BE SOLDERED TO THE GROUND PLANE.
EXPOSED METAL AT PACKAGE CORNERS IS
CONNECTED TO THIS PAD.
DVSS
DB10
DB11
DB9
DB8
DB7
DB6
DB5
10
Figure 2. AD9117 Pin Configuration
1
2
3
4
5
6
7
8
9
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PIN 1
INDICATOR
(Not to Scale)
AD9117
TOP VIEW
SET
SET
, is Enabled.
, is Enabled.
30 RLIN
29 IOUTN
28 IOUTP
27 RLIP
26 AVDD
25 AVSS
24 RLQP
23 QOUTP
22 QOUTN
21 RLQN
AD9114/AD9115/AD9116/AD9117