AD9116-EBZ Analog Devices, AD9116-EBZ Datasheet - Page 45

• Manufacturer Part Number: AD9116-EBZ
• Description: Dual, 8-/10-/12-/14-bit Low Power Digital-to-analog Converters
• Manufacturer: Analog Devices

Two registers are assigned to each DAC with 10 bits for the
actual DAC current to be generated, a 3-bit offset (and gain)
adjustment, a 2-bit current range adjustment, and an enable/
disable bit. Setting the QAUXOFS and IAUXOFS bits to all 1s
disables the op amp and routes the DAC current directly to
their respective FSADJI/ AUXI or FSADJQ/AUXQ pins. This
is especially useful where the loads to be driven are beyond
the limited capability of the on-chip amplifier. The respective
DAC output open circuits when not enabled (QAUXEN or
IAUXEN = 0).
DAC-TO-MODULATOR INTERFACING
The auxiliary DACs can be used for local oscillator (LO) cancella-
tion when the DAC output is followed by a quadrature modulator.
This LO feedthrough is caused by the input referred dc offset
voltage of the quadrature modulator (and the DAC output offset
voltage mismatch) and can degrade system performance. Typical
DAC-to-quadrature modulator interfaces are shown in Figure 93
and Figure 94. The input common-mode voltage for the modula-
tor could be higher than the output compliance range of the DAC,
even with the R
necessary. If the required common-mode input voltage on the
quadrature modulator is within that of the DAC, the dc blocking
capacitors in Figure 93 can be removed. The 50 Ω resistors can, of
course be omitted, if the internal resistors are used. A low-pass or
band-pass passive filter is recommended when spurious signals
from the DAC (distortion and DAC images) at the quadrature
modulator inputs can affect the system performance. Placing the
filter at the location shown in Figure 93 and Figure 94 allows easy
design of the filter because the source and load impedances can
easily be designed close to 50 Ω for a 20 mA full-scale output.
AD9114/AD9115/
AD9114/AD9115/
AD9114/AD9115/
AD9116/AD9117
AD9114/AD9115/
AD9116/AD9117
AD9116/AD9117
AD9116/AD9117
AUXDAC1
AUX2DAC
Q DAC
I DAC
CM
Figure 93. Typical Use of Auxiliary DACs
feature so that ac coupling or a dc level shift is
OPTIONAL
FILTERING
OPTIONAL
FILTERING
PASSIVE
PASSIVE
10kΩ
10kΩ
MODULATOR V+
MODULATOR V+
QUADRATURE
MODULATOR
I INPUTS
QUADRATURE
MODULATOR
Q INPUTS
Rev. 0 | Page 45 of 48
CORRECTING FOR NONIDEAL PERFORMANCE OF
QUADRATURE MODULATORS ON THE IF-TO-RF
CONVERSION
Analog quadrature modulators make it very easy to realize
single sideband radios. However, there are several nonideal
aspects of quadrature modulator performance. Among these
analog degradations are gain mismatch and LO feedthrough.
Gain Mismatch
The gain in the real and imaginary signal paths of the quad-
rature modulator may not be matched perfectly. This leads
to less than optimal image rejection because the cancellation
of the negative frequency image is less than perfect.
LO Feedthrough
The quadrature modulator has a finite dc referred offset, as well
as coupling from its LO port to the signal inputs. These can lead
to a significant spectral spur at the frequency of the Quadrature
Modulator LO.
The AD9114/AD9115/AD9116/AD9117 have the capability
to correct for both of these analog degradations. However,
understand that these degradations drift over temperature;
therefore, if close to optimal single sideband performance
is desired, a scheme for sensing these degradations over
temperature and correcting them may be necessary.
I/Q CHANNEL GAIN MATCHING
Fine gain matching is achieved by adjusting the values in the
DAC fine gain adjustment registers. For the I DAC, these values
are in the I DAC gain register (Register 0x03). For the Q DAC,
these values are in the Q DAC gain register (Register 0x06). These
are 6-bit values that cover ±2% of full scale. To perform gain com-
pensation by starting from the default values of zero, raise the
value of one of these registers a few steps until it can be deter-
mined if the amplitude of the unwanted image is increased
or decreased. If the unwanted image increased in amplitude,
remove the step and try the same adjustment on the other
DAC control register. Iterate register changes until the rejection
cannot be improved further. If the fine gain adjustment range is
not sufficient to find a null (that is, the register goes full scale with
no null apparent) adjust the course gain settings of the two DACs
accordingly and try again. Variations on this simple method are
possible.
AD9114/AD9115/
AD9116/AD9117
AD9114/AD9115/
Figure 94. Typical Use of Auxiliary DACs When DC Coupling to Quadrature
AD9116/AD9117
AUXDAC
I OR Q DAC
AD9114/AD9115/AD9116/AD9117
Modulator ADL537x Family
OPTIONAL
FILTERING
PASSIVE
100kΩ
1kΩ
ADL537x FAMILY
I OR Q INPUTS