AD9772EB Analog Devices, AD9772EB Datasheet - Page 17

• Manufacturer Part Number: AD9772EB
• Description: 14-Bit/ 160 MSPS TxDAC+ with 2x Interpolation Filter
• Manufacturer: Analog Devices

by a single-supply DAC or digital potentiometer, thus allowing
I
example shows the AD5220, an 8-bit serial input digital potenti-
ometer, along with the AD1580 voltage reference. Note, since
the input impedance of REFIO does interact and load the digi-
tal potentiometer wiper to create a slight nonlinearity in the
programmable voltage divider ratio, a digital potentiometer with
10 k or less of resistance is recommended.
ANALOG OUTPUTS
The AD9772 produces two complementary current outputs,
IOUTA and IOUTB, which may be configured for single-ended
or differential operation. IOUTA and IOUTB can be converted
into complementary single-ended voltage outputs, V
V
Transfer Function section, by Equations 5 through 8. The
differential voltage, V
can also be converted to a single-ended voltage via a transformer
or differential amplifier configuration.
Figure 35 shows the equivalent analog output circuit of the
AD9772, consisting of a parallel combination of PMOS differ-
ential current switches associated with each segmented current
source. The output impedance of IOUTA and IOUTB is deter-
mined by the equivalent parallel combination of the PMOS
switches and is typically 200 k
the nature of a PMOS device, the output impedance is also
slightly dependent on the output voltage (i.e., V
and, to a lesser extent, the analog supply voltage, AVDD, and
full-scale current, I
signal dependency can be a source of dc nonlinearity and ac linear-
ity (i.e., distortion), its effects can be limited if certain precau-
tions are noted.
REV. 0
REF
OUTB
AD1580
to be digitally controlled for a fixed R
1.2V
, via a load resistor, R
Figure 34. Single-Supply Gain Control Circuit
Figure 35. Equivalent Analog Output Circuit
10k
AD9772
AD5220
10k
OUTFS
R
SET
DIFF
. Although the output impedance’s
, existing between V
FSADJ
REFIO
REFLO
AD9772
LOAD
+1.2V REF
in parallel with 3 pF. Due to
, as described in the DAC
IOUTA
R
LOAD
SET
. This particular
250pF
OUTA
OUTA
IOUTB
R
+2.7 TO +3.6V
AVDD
LOAD
AVDD
and V
CURRENT
and V
SOURCE
ARRAY
OUTA
OUTB
OUTB
A
and
,
)
–17–
IOUTA and IOUTB also have a negative and positive voltage
compliance range. The negative output compliance range of
–1.0 V is set by the breakdown limits of the CMOS process.
Operation beyond this maximum limit may result in a break-
down of the output stage and affect the reliability of the AD9772.
The positive output compliance range is slightly dependent on
the full-scale output current, I
positive compliance range will induce clipping of the output
signal, which severely degrades the AD9772’s linearity and
distortion performance.
Operating the AD9772 with reduced voltage output swings at
IOUTA and IOUTB in a differential or single-ended output
configuration reduces the signal dependency of its output im-
pedance, thus enhancing distortion performance. Although the
voltage compliance range of IOUTA and IOUTB extends from
–1.0 V to +1.25 V, optimum distortion performance is achieved
when the maximum full-scale signal at IOUTA and IOUTB
does not exceed approximately 0.5 V. A properly selected trans-
former with a grounded center-tap will allow the AD9772 to
provide the required power and voltage levels to different loads
while maintaining reduced voltage swings at IOUTA and
IOUTB. DC-coupled applications requiring a differential or
single-ended output configuration should size R
ingly. Refer to Applying the AD9772 section for examples of
various output configurations.
The most significant improvement in the AD9772’s distortion
and noise performance is realized using a differential output
configuration. The common-mode error sources of both IOUTA
and IOUTB can be substantially reduced by the common-mode
rejection of a transformer or differential amplifier. These
common-mode error sources include even-order distortion
products and noise. The enhancement in distortion performance
becomes more significant as the reconstructed waveform’s
frequency content increases and/or its amplitude decreases.
The distortion and noise performance of the AD9772 is also
dependent on the full-scale current setting, I
I
of 20 mA will provide the best distortion and noise performance.
In summary, the AD9772 achieves the optimum distortion and
noise performance under the following conditions:
1. Positive voltage swing at IOUTA and IOUTB limited to
2. Differential Operation.
3. I
4. PLL Clock Multiplier Disabled
Note the majority of the AC Characterization Curves for the
AD9772 are performed under the above-mentioned operating
conditions.
DIGITAL INPUTS/OUTPUTS
The AD9772 consists of several digital input pins used for data,
clock and control purposes. It also contains a single digital out-
put pin, PLLLOCK, used to monitor the status of the internal
PLL clock multiplier or provide a 1 clock output. The 14-bit
parallel data inputs follow standard positive binary coding where
DB13 is the most significant bit (MSB), and DB0 is the least
significant bit (LSB). IOUTA produces a full-scale output
current when all data bits are at Logic 1. IOUTB produces a
OUTFS
+0.5 V.
OUTFS
can be set between 2 mA and 20 mA, selecting an I
set to 20 mA.
OUTFS
. Operation beyond the
OUTFS
AD9772
LOAD
. Although
accord-
OUTFS