AD9742-EB Analog Devices, AD9742-EB Datasheet - Page 9

• Manufacturer Part Number: AD9742-EB
• Description: 12-Bit/ 165 MSPS TxDAC D/A Converter
• Manufacturer: Analog Devices

FUNCTIONAL DESCRIPTION
Figure 3 shows a simplified block diagram of the AD9742. The
AD9742 consists of a DAC, digital control logic, and full-scale
output current control. The DAC contains a PMOS current
source array capable of providing up to 20 mA of full-scale
current (I
that make up the five most significant bits (MSBs). The next
four bits, or middle bits, consist of 15 equal current sources
whose value is 1/16th of an MSB current source. The remaining
LSBs are binary weighted fractions of the middle bits current
sources. Implementing the middle and lower bits with current
sources, instead of an R-2R ladder, enhances its dynamic perfor-
mance for multitone or low amplitude signals and helps maintain
the DAC’s high output impedance (i.e., >100 kW).
All of these current sources are switched to one or the other of
the two output nodes (i.e., IOUTA or IOUTB) via PMOS
differential current switches. The switches are based on the
architecture that was pioneered in the AD9764 family, with
further refinements to reduce distortion contributed by the
switching transient. This switch architecture also reduces
various timing errors and provides matching complementary
drive signals to the inputs of the differential current switches.
The analog and digital sections of the AD9742 have separate
power supply inputs (i.e., AVDD and DVDD) that can operate
independently over a 3.0 V to 3.6 V range. The digital section,
which is capable of operating up to a 165 MSPS clock rate,
consists of edge-triggered latches and segment decoding logic
circuitry. The analog section includes the PMOS current
sources, the associated differential switches, a 1.2 V band gap
voltage reference, and a reference control amplifier.
The DAC full-scale output current is regulated by the refer-
ence control amplifier and can be set from 2 mA to 20 mA via
an external resistor, R
(FSADJ) pin. The external resistor, in combination with both
the reference control amplifier and voltage reference, V
sets the reference current I
segmented current sources with the proper scaling factor. The
full-scale current, I
REV. 0
OUTFS
). The array is divided into 31 equal currents
0.1 F
OUTFS
CLOCK
SET
V
REFIO
R
, is 32 times I
2k
, connected to the full-scale adjust
SET
REF
, which is replicated to the
3.3V
I
REF
REF
CLOCK
REFIO
FS ADJ
DVDD
DCOM
SLEEP
+1.20V REF
.
REFLO
Figure 3. Simplified Block Diagram
SEGMENTED SWITCHES
FOR DB11–DB3
DIGITAL DATA INPUTS (DB11–DB0)
150pF
REFIO
,
LATCHES
CURRENT SOURCE
–9–
ARRAY
PMOS
REFERENCE OPERATION
The AD9742 contains an internal 1.2 V band gap reference.
The internal reference can be disabled by raising REFLO to
AVDD. It can also be easily overridden by an external reference
with no effect on performance. REFIO serves as either an input
or output depending on whether the internal or an external
reference is used. To use the internal reference, simply decouple
the REFIO pin to ACOM with a 0.1 mF capacitor and connect
REFLO to ACOM via a resistance less than 5 W. The internal
reference voltage will be present at REFIO. If the voltage at
REFIO is to be used anywhere else in the circuit, an external
buffer amplifier with an input bias current of less than 100 nA
should be used. An example of the use of the internal reference
is given in Figure 4.
An external reference can be applied to REFIO as shown in
Figure 5. The external reference may provide either a fixed refer-
ence voltage to enhance accuracy and drift performance or a
varying reference voltage for gain control. Note that the 0.1 mF
compensation capacitor is not required since the internal refer-
ence is overridden, and the relatively high input impedance of
REFIO minimizes any loading of the external reference.
3.3V
ADDITIONAL
SWITCHES
AVDD
EXTERNAL
LSB
AVDD
REF
LOAD
Figure 5. External Reference Configuration
Figure 4. Internal Reference Configuration
AD9742
REF BUFFER
ACOM
R
EXTERNAL
OPTIONAL
SET
IOUTA
IOUTB
V
I
V
REFIO
REF
REFIO
0.1 F
=
MODE
IOUTB
2k
/R
SET
IOUTA
REFIO
FS ADJ
REFIO
FS ADJ
+1.2V REF
V
+1.2V REF
AD9742
AD9742
DIFF
V
R
50
OUTB
LOAD
REFLO
= V
REFLO
OUTA
– V
V
R
50
150pF
OUTB
OUTA
LOAD
150pF
REFERENCE
CONTROL
AMPLIFIER
AD9742
CURRENT
SOURCE
ARRAY
CURRENT
SOURCE
3.3V
ARRAY
3.3V
AVDD
AVDD