AD9742-EB Analog Devices, AD9742-EB Datasheet - Page 5

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AD9742-EB

Manufacturer Part Number
AD9742-EB
Description
12-Bit/ 165 MSPS TxDAC D/A Converter
Manufacturer
Analog Devices
Datasheet
Pin No.
1
2–11
12
13, 14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
REV. 0
Mnemonic
DB11
DB10–DB1
DB0
NC
SLEEP
REFLO
REFIO
FS ADJ
NC
ACOM
IOUTB
IOUTA
RESERVED
AVDD
MODE
DCOM
DVDD
CLOCK
Most Significant Data Bit (MSB)
Data Bits 10–1
Power-Down Control Input. Active high. Contains active pull-down circuit; it may be left
Complementary DAC Current Output. Full-scale current when all data bits are 0s.
DAC Current Output. Full-scale current when all data bits are 1s.
Reserved. Do Not Connect to Common or Supply.
Analog Supply Voltage (3.3 V)
Digital Supply Voltage (3.3 V)
Clock Input. Data latched on positive edge of clock.
Description
Least Significant Data Bit (LSB)
No Internal Connection
unterminated if not used.
Reference Ground when internal 1.2 V reference used. Connect to AVDD to disable internal reference.
Reference Input/Output. Serves as reference input when internal reference disabled (i.e., tie REFLO
to AVDD). Serves as 1.2 V reference output when internal reference activated (i.e., tie REFLO to AGND).
Requires 0.1 mF capacitor to AGND when internal reference activated.
Full-Scale Current Output Adjust
No Internal Connection
Analog Common
Selects Input Data Format. Connect to DGND for straight binary, DVDD for two’s complement.
Digital Common
PIN FUNCTION DESCRIPTIONS
(MSB) DB11
(LSB) DB0
PIN CONFIGURATION
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
NC
NC
10
11
12
13
14
1
2
3
4
5
6
7
8
9
NC = NO CONNECT
(Not to Scale)
AD9742
TOP VIEW
–5–
28
27
26
25
24
23
22
20
19
18
17
16
15
21
CLOCK
DVDD
DCOM
MODE
AVDD
RESERVED
IOUTA
IOUTB
ACOM
NC
FS ADJ
REFIO
REFLO
SLEEP
AD9742

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