AD9742-EB Analog Devices, AD9742-EB Datasheet - Page 14

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AD9742-EB

Manufacturer Part Number
AD9742-EB
Description
12-Bit/ 165 MSPS TxDAC D/A Converter
Manufacturer
Analog Devices
Datasheet
AD9742
either one of the differential DAC outputs will occur when the
full-scale current is directed toward that output. As a result, the
PSRR measurement in Figure 15 represents a worst-case condition in
which the digital inputs remain static and the full-scale output
current of 20 mA is directed to the DAC output being measured.
An example serves to illustrate the effect of supply noise on the
analog supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for simplicity
sake (i.e., ignore harmonics), all of this noise is concentrated at
250 kHz. To calculate how much of this undesired noise will
appear as current noise superimposed on the DAC’s full-scale
current, I
Figure 15 at 250 kHz. To calculate the PSRR for a given R
such that the units of PSRR are converted from A/V to V/V,
adjust the curve in Figure 15 by the scaling factor 20 ¥ log(R
For instance, if R
PSRR of the DAC at 250 kHz which is 85 dB in Figure 15
becomes 51 dB V
Proper grounding and decoupling should be a primary objective
in any high-speed, high resolution system. The AD9742 features
separate analog and digital supply and ground pins to optimize
the management of analog and digital ground currents in a system.
In general, AVDD, the analog supply, should be decoupled to
ACOM, the analog common, as close to the chip as physically
possible. Similarly, DVDD, the digital supply, should be decoupled
to DCOM as close to the chip as physically possible.
For those applications that require a single 3.3 V supply for both
the analog and digital supplies, a clean analog supply may be
generated using the circuit shown in Figure 16. The circuit
consists of a differential LC filter with separate power supply
and return lines. Lower noise can be attained by using low ESR
type electrolytic and tantalum capacitors.
OUTFS
, one must determine the PSRR in dB using
LOAD
OUT
/V
is 50 W, the PSRR is reduced by 34 dB (i.e.,
IN
).
LOAD
LOAD
).
,
–14–
EVALUATION BOARD
General Description
The TxDAC Family Evaluation Board allows for easy set up
and testing of any TxDAC product in the 28-lead SOIC pack-
age. Careful attention to layout and circuit design combined
with a prototyping area allow the user to evaluate the AD9742
easily and effectively in any application where high resolution,
high-speed conversion is required.
This board allows the user the flexibility to operate the AD9742
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, and single and differ-
ential outputs. The digital inputs are designed to be driven from
various word generators, with the on-board option to add a
resistor network for proper load termination. Provisions are also
made to operate the AD9742 with either the internal or external
reference or to exercise the power-down feature.
Figure 16. Differential LC Filter for Single 3.3 V Applications
TTL/CMOS
CIRCUITS
LOGIC
POWER SUPPLY
3.3V
FERRITE
BEADS
100 F
ELECT.
10–22 F
TANT.
0.1 F
CER.
REV. 0
AVDD
ACOM

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