OPA686 Burr-Brown, OPA686 Datasheet - Page 14

• Manufacturer Part Number: OPA686
• Description: Wideband / Low Noise / Voltage Feedback OPERATIONAL AMPLIFIER
• Manufacturer: Burr-Brown

THERMAL ANALYSIS
The OPA686 will not require heatsinking or airflow in most
applications. Maximum desired junction temperature will
set the maximum allowed internal power dissipation as
described below. In no case should the maximum junction
temperature be allowed to exceed +175 C.
Operating junction temperature (T
quiescent power (P
the output stage (P
power is simply the specified no-load supply current times
the total supply voltage across the part. P
the required output signal and load but would, for a grounded
resistive load, be at a maximum when the output is fixed at
a voltage equal to 1/2 either supply voltage (for equal bipolar
supplies). Under this worst-case condition, P
R
Note that it is the power in the output stage and not in the
load that determines internal power dissipation.
As a worst-case example, compute the maximum T
OPA686N (SOT23-5 package) in the circuit of Figure 1
operating at the maximum specified ambient temperature of
+85 C and driving a grounded 100
P
Maximum T
BOARD LAYOUT
Achieving optimum performance with a high frequency
amplifier like the OPA686 requires careful attention to
board layout parasitics and external component types. Rec-
ommendations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for
all of the signal I/O pins. Parasitic capacitance on the
output and inverting input pins can cause instability: on the
non-inverting input, it can react with the source impedance
to cause unintentional bandlimiting. To reduce unwanted
capacitance, a window around the signal I/O pins should be
opened in all of the ground and power planes around those
pins. Otherwise, ground and power planes should be unbro-
ken elsewhere on the board.
b) Minimize the distance (< 0.25") from the power
supply pins to high frequency 0.1 F decoupling capaci-
tors. At the device pins, the ground and power plane layout
should not be in close proximity to the signal I/O pins. Avoid
narrow power and ground traces to minimize inductance
between the pins and the decoupling capacitors. The power
supply connections should always be decoupled with these
capacitors. Larger (2.2 F to 6.8 F) decoupling capacitors,
effective at lower frequency, should also be used on the
main supply pins. These may be placed somewhat farther
from the device and may be shared among several devices in
the same area of the PC board.
c) Careful selection and placement of external compo-
nents will preserve the high frequency performance of
the OPA686. Resistors should be a very low reactance type.
JA
D
L
) where R
. The total internal power dissipation (P
= 10V (13.9mA) + 5
J
L
®
= +85 C + (0.21W • 150 C/W) = 117 C
includes feedback network loading.
OPA686
DQ
DL
) and additional power dissipated in
) to deliver load power. Quiescent
2
/(4 • (100
J
) is given by T
load at +2.5V
|| 500 )) = 214mW
DL
D
will depend on
) is the sum of
DL
= V
J
A
using an
DC
+ P
S
2
.
/(4 •
D
•
14
Surface-mount resistors work best and allow a tighter over-
all layout. Metal-film and carbon composition, axially-leaded
resistors can also provide good high frequency performance.
Again, keep their leads and PC board trace length as short as
possible. Never use wirewound type resistors in a high
frequency application. Since the output pin and inverting
input pin are the most sensitive to parasitic capacitance,
always position the feedback and series output resistor, if
any, as close as possible to the output pin. Other network
components, such as non-inverting input termination resis-
tors, should also be placed close to the package. Where
double-side component mounting is allowed, place the feed-
back resistor directly under the package on the other side of
the board between the output and inverting input pins. Even
with a low parasitic capacitance shunting the external resis-
tors, excessively high resistor values can create significant
time constants that can degrade performance. Good axial
metal-film or surface-mount resistors have approximately
0.2pF in shunt with the resistor. For resistor values > 1.5k ,
this parasitic capacitance can add a pole and/or a zero below
500MHz that can effect circuit operation. Keep resistor
values as low as possible consistent with load driving con-
siderations. It has been suggested here that a good starting
point for design would be set the R
this will automatically keep the resistor noise terms low, and
minimize the effect of their parasitic capacitance.
d) Connections to other wideband devices on the board
may be made with short direct traces or through on-
board transmission lines. For short connections, consider
the trace and the input to the next device as a lumped
capacitive load. Relatively wide traces (50mils to 100mils)
should be used, preferably with ground and power planes
opened up around them. Estimate the total capacitive load
and set R
Load. Low parasitic capacitive loads (< 5pF) may not need
an R
operate with a 2pF parasitic load. Higher parasitic capacitive
loads without an R
(increasing the unloaded phase margin). If a long trace is
required, and the 6dB signal loss intrinsic to a doubly-
terminated transmission line is acceptable, implement a
matched impedance transmission line using microstrip or
stripline techniques (consult an ECL design handbook for
microstrip and stripline layout techniques). A 50
ment is normally not necessary on board, and in fact, a
higher impedance environment will improve distortion as
shown in the distortion versus load plots. With a character-
istic board trace impedance defined based on board material
and trace dimensions, a matching series resistor into the
trace from the output of the OPA686 is used as well as a
terminating shunt resistor at the input of the destination
device. Remember also that the terminating impedance will
be the parallel combination of the shunt resistor and the
input impedance of the destination device; this total effec-
tive impedance should be set to match the trace impedance.
If the 6dB attenuation of a doubly-terminated transmission
line is unacceptable, a long trace can be series-terminated at
the source end only. Treat the trace as a capacitive load in
this case and set the series resistor value as shown in the plot
S
since the OPA686 is nominally compensated to
S
from the plot of recommended R
S
are allowed as the signal gain increases
G
be set to 50 . Doing
S
vs Capacitive
environ-