L64780 LSI Logic Corporation, L64780 Datasheet - Page 77
L64780
Manufacturer Part Number
L64780
Description
Dvb-t Cofdm Demodulator Technical Manual 2/00
Manufacturer
LSI Logic Corporation
Datasheet
1.L64780.pdf
(126 pages)
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4.4.6 Address Line 0x0C
AGC_TARGET_MSB
TIM_LOOP_I Timing Gain Loop 2
Parameter Registers
0x0C
7
TIM_LOOP_I
AGC Target RMS Value (MSB)
These bits select the MSBs of the Target RMS value of
the AGC Loop (see
Value”).
The initial condition for these bits is 0x0E.
These bits adjust the Timing Gain of the Loop Filter. The
value is set according to the sensitivity of the VXCO loop.
The initial condition for the TIM_LOOP_I is ob011
(Gain 3)
0
0
0
0
1
1
1
1
TIM_LOOP_I[2:0]
K
I
5
1.95
0
0
1
1
0
0
1
1
10
Section 2.3.1, “AGC Target RMS
4
–
3
.
TIM_LOOP_P
0
1
0
1
0
1
0
1
K
Definition
K
K
K
K
K
K
K
I
I
I
I
I
I
I
I
3.125
0.125
7.8
4.8
3
1.95
1.22
7.63
2
10
10
10
–
10
10
5
10
–
–
10
3
4
–
–
–
3
4
6
–
2
TIM_IIRGAIN
1
R/W [5:0]
R/W [7:5]
0
4-25
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