L64780 LSI Logic Corporation, L64780 Datasheet - Page 27

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L64780

Manufacturer Part Number
L64780
Description
Dvb-t Cofdm Demodulator Technical Manual 2/00
Manufacturer
LSI Logic Corporation
Datasheet
2.6.2 TIM_CLK_INIT Register Definition
2.6.3 TIM External Loop Filter
This leads to K
Equation 2.9
The TIM_CLK_INIT register is defined as a two’s complement 15-bit
register that has the following meaning:
Equation 2.10
where W
The control voltage signal of the VCXO drives the Sigma Delta
modulated output, VCXOUT. Use the VCXOUT to drive an external
passive RC filter that feeds the timing clock control stage. See
Figure
Figure 2.4
VCXOUT
The 3 dB cutoff frequency of this system is f
estimate of the TIM Loop Bandwidth and resulting in a low-pass filter
time constant T1 = RC = 750 s.
The R and C values for the low-pass filter must meet the following
requirement: R
Time Synchronization
2.4.
0
is the central frequency of the VCXO.
5V
External Low-Pass Loop Filter
TIM
I
R= 1 k
and K
K
W
I
i
=
C
TIM
------------------
K
P
W
VCXO
0.1
values equal to:
0
= 750 s.
R
TIM
5K
-------------------------------------------------------------------
= 10 k
VCXO
TIM_CLK_INIT
2
C
15
TIM
K
= 75 nF
P
0
=
= 212 Hz, giving an
512 K
I
2-9

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