L64767 LSI Logic Corporation, L64767 Datasheet - Page 6

• Manufacturer Part Number: L64767
• Description: Smatv Qam Encoder
• Manufacturer: LSI Logic Corporation

Circular FIFO Buffer
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Synchronizing the L64767 with an input pulse will set byte and block
boundaries with the pulse. The sync byte you define can be reinserted
at the location of the pulse.
A dual-ported RAM implements the circular FIFO buffer in the L64767.
The circular buffer has a write pointer driven by ICLK, and a read pointer
driven by OCLK/4 (or OCLK/2 in 2-fold oversampling mode). Since there
are no built-in mechanisms to prevent collisions of these pointers, you
must configure the follow-up time and proper initial setup of the pointer
distance through the phase-locked loop (PLL) module of the L64767. The
circular FIFO buffer is illustrated in
You can ensure that the read pointer is directly opposite to the write
pointer most of the time by properly programming delay values. This
approach reduces the effect of PLL frequency swings that can occur
during phases of an unstable input signal. You can also select smaller
distances to reduce system delay.
Figure 3. Circular Read/Write FIFO Buffer
Read Pointer
To initialize the circular FIFO buffer, download 0 to 127 cycles into the
read address pointer to specify the distance between the read and write
pointers. To do this, you can specify the FIFO delay value. When
specifying this value, you must use Gray code numbers with even parity
(an even number of 1s). Both the read and write pointers are Gray code
counter-driven. The write pointer is initialized to zero when the read
counter is loaded.
L64767 SMATV QAM Encoder
Specify a unique sync byte to be inserted in the input stream in a
specified sync length distance
128 Words
Circular
Buffer
Write Pointer
Figure
Zero
MD97.16
3.